CN-121986574-A - Mu LED device and method for manufacturing mu LED device
Abstract
The invention relates to a mu-LED device comprising a layer stack with a first layer of a first doping type and a second layer of a second doping type and an active layer structure between the first layer and the second layer. The first contact covers a surface of the first layer, which surface faces away from the active layer structure. The semiconductor layer forms microlenses deposited on a surface of the second layer, the surface facing away from the active layer structure. The layer stack includes first mesa etched sidewalls and second mesa etched sidewalls extending from the first layer along the active layer structure toward the second layer, the sidewalls forming microlenses.
Inventors
- MICHAEL BINDER
- Martin Hertzler
- Tanson Valguez
Assignees
- 艾迈斯-欧司朗国际有限责任公司
Dates
- Publication Date
- 20260505
- Application Date
- 20240926
- Priority Date
- 20231002
Claims (20)
- 1. A μled device comprising: -a layer stack having a first layer of a first doping type and a second layer of a second doping type and an active layer structure between the first layer and the second layer; -a first contact covering a surface of the first layer, the surface facing away from the active layer structure; -a semiconductor layer forming microlenses deposited on a surface of the second layer, the surface facing away from the active layer structure; -wherein the layer stack comprises a first mesa etched sidewall extending from the first layer along the active layer structure towards the second layer; -wherein the semiconductor layer comprises second mesa etched sidewalls, the sidewalls forming the microlenses.
- 2. The apparatus of claim 1, wherein, -The second mesa etch sidewalls each comprise an increased periphery in a direction towards the active layer structure and the first mesa etch comprises one of an increased periphery in a direction towards the active layer structure or a substantially equal periphery in a direction towards the active layer structure.
- 3. The apparatus of any preceding claim, wherein the first mesa etched sidewall extends into a portion of the second layer, optionally exposing a planar surface portion of the second layer adjacent the sidewall.
- 4. The apparatus of any preceding claim, wherein the second mesa etched sidewall extends into a portion of the second layer, optionally through the second layer to a dielectric layer surrounding the layer stack.
- 5. The device according to any of the preceding claims, wherein, The periphery of the second mesa-etched sidewall closest to the active layer structure is larger than the periphery of the first mesa-etched sidewall closest to the active layer structure, or The periphery of the second mesa etch sidewall comprises a maximum value greater than the maximum value of the periphery of the first mesa etch sidewall, or -Wherein the maximum periphery of the semiconductor layer is larger than the periphery of one of the maximum periphery of the active layer structure and the first mesa etched sidewall.
- 6. The device according to any of the preceding claims, wherein, Depositing a conductive layer material, in particular one of a reflective metal and ITO, on a portion of the second mesa-etched sidewall of the microlens, thereby forming a second contact, and/or -A dielectric layer is deposited on a portion of the second mesa etch sidewall, the dielectric layer covering at least a portion of the second doped layer and optionally a portion of the regrowth layer exposed by the second mesa etch.
- 7. The apparatus of any preceding claim, wherein the first mesa etched sidewall is covered by one or more regrowth layers extending onto a surface of the first layer facing away from the active layer structure, onto the sidewall, and optionally onto a planar surface portion of the second doped layer adjacent to the sidewall.
- 8. A device according to any preceding claim, wherein a sidewall is covered by a passivation layer extending from the sidewall onto a planar portion of the second doped layer adjacent the sidewall.
- 9. The apparatus of any preceding claim, wherein the semiconductor layer comprises: -a doped contact layer deposited on the second layer of a second doping type and optionally in contact with a metal layer forming a second contact; -a substantially undoped layer on the doped contact layer, the undoped layer optionally comprising a lower refractive index than the doped contact layer and/or optionally comprising a larger bandgap than the doped contact layer.
- 10. The device of any of the preceding claims, wherein the first contact comprises a reflective metal extending from the surface of the first layer onto the sidewall of the layer stack.
- 11. The apparatus of any of the preceding claims, wherein the layer stack is based on a phosphide material system, wherein the active layer structure comprises InGaAlP having different Al concentrations in different sublayers thereof, and wherein the semiconductor material comprises one of InGaAlP and InAlP.
- 12. The device according to any of the preceding claims, wherein the semiconductor layer comprises an optically active structure on its shaped surface, in particular one of the following: -an anti-reflective coating; -roughening the surface, and -Generating a periodic structure of the optical bandgap.
- 13. A method for processing a μled device, comprising the steps of: -providing a growth substrate with an optional buffer layer; -epitaxially depositing a semiconductor layer on the growth substrate; -epitaxially depositing a layer stack on the semiconductor layer, the layer stack having a first layer of a first doping type and a second layer of a second doping type and an active layer structure between the first layer and the second layer, the second layer being oriented towards the semiconductor layer; -performing a first mesa etch process to expose sidewalls of the first layer, the active layer structure and optionally a portion of the second layer, wherein the first mesa etch process generates an exposed surface of the second layer substantially parallel to the growth substrate; -optionally annealing the exposed sidewalls; -depositing a first contact material over a surface of the first layer and the exposed sidewalls of the layer stack, the first contact material being electrically isolated from the exposed sidewalls; -re-bonding the layer stack and subsequently removing the growth substrate; -performing a second mesa etching process in the semiconductor layer to form a microlens arranged substantially centrally over the layer stack; -depositing a second contact on or along the periphery of the mesa-etched sidewalls of the semiconductor layer.
- 14. The method of claim 13, wherein optionally annealing the exposed sidewalls comprises the steps of: -depositing one or more regrowth layers on the exposed sidewalls, the regrowth layers comprising undoped or p-doped material, the regrowth layers comprising a larger band gap than the material of the active layer structure; -depositing a dielectric material on the one or more regrowth layers, optionally covering the exposed surface of the second layer substantially parallel to the growth substrate.
- 15. The method of any of claims 13 to 14, wherein the first mesa etching process and/or the second mesa etching process is performed to form sloped sidewalls, wherein a slope of the sidewalls of the layer stack relative to a lateral dimension of the active layer structure is substantially constant, wherein a slope of the sidewalls of the semiconductor layer relative to a lateral dimension of the active layer structure comprises at least two different values.
- 16. The method of any of claims 13 to 15, wherein the first mesa etched sidewall and/or the second mesa etched sidewall each comprise an increased periphery in a direction toward the active layer structure.
- 17. The method of any of claims 13 to 16, wherein a lateral dimension of the sidewall generated during the first mesa etch is less than a lateral dimension of the sidewall generated during the second mesa etch.
- 18. The method of any of claims 13 to 17, wherein performing a second mesa etching process comprises at least one of: -etching the semiconductor layer such that a small portion of the doped semiconductor layer remains on top of the second layer; -etching the semiconductor layer until the second layer is reached; -optionally etching at least a portion of the second layer -Optionally etching through the second layer up to a passivation layer or an etch stop layer.
- 19. The method of any of claims 13 to 18, wherein performing a second mesa etch process comprises: -depositing a conductive layer material, in particular one of a reflective metal and ITO, on a portion of the second mesa-etched sidewall, in particular on a portion of the second mesa-etched sidewall adjacent to the periphery of the semiconductor layer, thereby forming a second contact, forming a second contact.
- 20. The method of any of claims 13 to 19, wherein performing a second mesa etch process comprises: a dielectric layer material is deposited on a planar surface adjacent to the sidewalls of the semiconductor layer exposed by the second mesa etch process, the dielectric layer optionally covering exposed portions of one of the second layer and the one or more regrowth layers.
Description
Mu LED device and method for manufacturing mu LED device The present application claims priority from german application DE 10 2023 126 794.9 filed on month 10 and 2 of 2023, the disclosure of which is incorporated herein by reference in its entirety. The present application relates to a μled device with integrated micro-lenses with improved performance and a method for processing a μled with integrated micro-lenses. Background The μled is used in a variety of different applications including, but not limited to, projection display applications. In the case of VR or AR applications, the overall display size is relatively small, at most a few cm2, which is challenging when high resolution such as HD r is to be achieved even more. Thus, a μled is used because it provides a very small size of only a few μm2 with sufficient brightness. However, in addition to achieving brightness on all of the primary colors red, blue, and green, high directivity and little or no optical crosstalk are also required. Depending on the design, the μled is either implemented as an integrated device array or placed individually on the surface of a circuit board wafer. In general, for high brightness and reduced optical crosstalk, optoelectronic devices and μleds are typically mesa etched during processing to optically and electrically isolate individual devices on the wafer. The process is applicable to stand-alone devices as well as integrated arrays. However, mesa etching results in non-radiative recombination (NRR) of charge carriers at the mesa edge due to defects (dangling bonds acting as non-radiative recombination centers) created in the structure of the optoelectronic device along the mesa edge. Current diffusion in and through the layers above and below the active region allows charge carriers to propagate in the direction of the pixel edge, which then non-radiatively recombine at the defect, reducing the quantum efficiency of the μled. This effect is less relevant for optoelectronic devices based on nitride material systems due to the short diffusion length of charge carriers in the material system. However, for phosphide-based materials such as InGaP, inAlP or indium gallium aluminum phosphite (InGaAlP) -based μ -LEDs, the diffusion length is significantly larger, and possibly even greater than the length of these devices. Mu LEDs based on such material systems are typically used for red to yellow luminescence, however the emission wavelength may vary with the composition. In addition to the diffusion length, inGaAlP-based μleds (red emission) also include a high refractive index, resulting in high internal losses and low light extraction efficiency. It is therefore an object of the present invention to address some of the above problems to improve the overall efficiency and directionality of the mu LED intended for AR and VR applications. Disclosure of Invention This and other objects are solved by the subject matter of the independent claims. Features and further aspects of the proposed principles are outlined in the dependent claims. The inventors propose to combine microlens (μlens) formation using semiconductor material with a pixelation process to separate individual light emitting layer stacks. In this way, improved light out-coupling and charge carrier confinement for enhanced internal quantum efficiency may be combined in one design. The proposed concept only utilizes two mesa etching steps from two opposite sides, where each step can be optimized separately from the other steps. The proposed method is not limited to a specific material system or processing technique. Quite different material systems may likewise be used, including phosphides, nitrides and arsenides. The design of the μled can be chosen independently of the microlens design and is optimized for high internal quantum efficiency, for example. Microlenses can provide a variety of functions depending on the application requirements. To this extent, the processing can be optimized and the overall structure post-processed to add further optical functions such as, but not limited to, collimation, shaping of the light using an optical bandgap, and even light conversion and mixing. Accordingly, the inventors propose in some aspects a LED device comprising a layer stack having a first layer of a first doping type and a second layer of a second doping type and an active layer structure between the first layer and the second layer. The active layer structure may comprise a single pn junction, quantum well or multiple quantum well structure. Depending on the design, different material compositions for the layers of the active layer structure are possible, i.e. different Al concentrations are used to provide the barrier layer and the quantum well layer in the multiple quantum well structure. Likewise, the first doped layer and the second doped layer may include one or more sublayers that facilitate various functions (e.g., charge carrier injection and charge c