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CN-121986575-A - Display module

CN121986575ACN 121986575 ACN121986575 ACN 121986575ACN-121986575-A

Abstract

A display module is disclosed. The disclosed display module includes a glass substrate, a Thin Film Transistor (TFT) layer formed on one surface of the glass substrate, and a plurality of light emitting diodes disposed on the TFT layer. The TFT layer includes a plurality of pixel circuits arranged in a grid and for driving a plurality of light emitting diodes, and a plurality of gate-in-panel (GIP) circuits spaced apart from each other in a thickness direction of the TFT layer with respect to the plurality of pixel circuits.

Inventors

  • WU DONGJIAN
  • Pu Yuangen
  • Xu Zhengbi
  • Ding Yingji

Assignees

  • 三星电子株式会社

Dates

Publication Date
20260505
Application Date
20240924
Priority Date
20231010

Claims (15)

  1. 1. A display module, comprising: A glass substrate; A thin film transistor TFT layer formed on one surface of the glass substrate, and A plurality of light emitting diodes disposed on the TFT layer, Wherein the TFT layer includes: A plurality of pixel circuits arranged in a grid and for driving the plurality of light emitting diodes, and The gate GIP circuits in the plurality of panels are spaced apart from each other in the thickness direction of the TFT layer with respect to the plurality of pixel circuits.
  2. 2. The display module of claim 1, wherein, The TFT layer includes a plurality of metal layers sequentially stacked at intervals, Each of the plurality of pixel circuits is formed on some of the plurality of metal layers, and The plurality of GIP circuits are formed on the remaining metal layers of the plurality of metal layers.
  3. 3. The display module according to claim 1, Wherein the TFT layer includes a first metal layer, a second metal layer, a third metal layer and a fourth metal layer sequentially stacked at intervals, Each of the plurality of pixel circuits is formed on the first metal layer and the second metal layer, and Each of the plurality of GIP circuits is formed on the third metal layer and the fourth metal layer.
  4. 4. A display module according to claim 3, Wherein the plurality of metal layers further includes a fifth metal layer stacked on an upper side of the fourth metal layer at a spacing, and And forming a pixel electrode electrically connected with the plurality of light emitting diodes on the fifth metal layer.
  5. 5. The display module according to claim 1, Wherein the plurality of pixel circuits includes LTPS TFTs, and The plurality of GIP circuits include oxide TFTs.
  6. 6. The display module according to claim 1, Wherein the plurality of pixel circuits includes LTPS TFTs, and The plurality of GIP circuits includes LTPS TFTs.
  7. 7. The display module according to claim 1, Wherein the plurality of pixel circuits includes an oxide TFT, and The plurality of GIP circuits include oxide TFTs.
  8. 8. The display module according to claim 1, Wherein the plurality of light emitting diodes are micro LEDs.
  9. 9. The display module according to claim 1, Wherein the plurality of GIP circuits are micro LEDs, a portion of which overlaps one of the plurality of light emitting diodes.
  10. 10. A display module, comprising: A substrate; A thin film transistor TFT layer disposed on one surface of the substrate and including a plurality of pixel circuits and at least one in-panel gate GIP circuit disposed at different heights from the plurality of pixel circuits, and A plurality of micro LEDs disposed on the TFT layer.
  11. 11. The display module according to claim 10, Wherein the TFT layer further comprises: a first metal layer on which the plurality of pixel circuits are formed, and a second metal layer stacked with the first metal layer therebetween.
  12. 12. The display module according to claim 11, Wherein the TFT layer further comprises: Three or more metal layers on which the at least one GIP circuit is formed.
  13. 13. The display module according to claim 10, Wherein the plurality of pixel circuits includes LTPS TFTs.
  14. 14. The display module according to claim 13, Wherein the at least one GIP circuit includes an oxide TFT or an LTPS TFT.
  15. 15. The display module according to claim 10, Wherein the plurality of pixel circuits and the at least one GIP circuit include oxide TFTs.

Description

Display module Technical Field The present disclosure relates to a display module including a Gate In Panel (GIP) circuit structure. Background The display substrate includes a TFT layer including a plurality of Thin Film Transistors (TFTs) and a plurality of light emitting diodes mounted on the TFT layer. The plurality of light emitting diodes express various colors when operated in units of pixels or sub-pixels. The operation of each pixel or sub-pixel is controlled by a plurality of TFTs. Each light emitting diode emits various colors, such as red, green, and blue. Disclosure of Invention Solution to the problem A display module according to one or more embodiments of the present disclosure may include a glass substrate, a Thin Film Transistor (TFT) layer formed on one surface of the glass substrate, and a plurality of light emitting diodes disposed on the TFT layer. The TFT layer may include a plurality of pixel circuits arranged in a grid and for driving the plurality of light emitting diodes, and a plurality of gate-in-panel (GIP) circuits spaced apart from each other in a thickness direction of the TFT layer with respect to the plurality of pixel circuits. The TFT layer may include a plurality of metal layers sequentially stacked at intervals. Each of the plurality of pixel circuits may be formed on some of the plurality of metal layers. The plurality of GIP circuits may be formed on the remaining metal layers of the plurality of metal layers. The TFT layer may include a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer sequentially stacked at intervals. Each of the plurality of pixel circuits may be formed on the first metal layer and the second metal layer. Each of the plurality of GIP circuits may be formed on the third metal layer and the fourth metal layer. The plurality of metal layers may further include a fifth metal layer stacked on an upper side of the fourth metal layer with a space therebetween. On the fifth metal layer, pixel electrodes electrically connected to the plurality of light emitting diodes may be formed. The plurality of metal layers may include LTPS TFTs, and the plurality of GIP circuits may include oxide TFTs. The plurality of pixel circuits may include LTPS TFTs, and the plurality of GIP circuits may include LTPS TFTs. The plurality of pixel circuits may include oxide TFTs, and the plurality of GIP circuits may include oxide TFTs. The plurality of light emitting diodes may be micro LEDs. A portion of the plurality of GIP circuits may overlap one of the plurality of light emitting diodes. A display module according to one or more embodiments may include a substrate, a Thin Film Transistor (TFT) layer disposed on one surface of the substrate and including a plurality of pixel circuits and at least one gate-in-panel (GIP) circuit disposed at different heights from the plurality of pixel circuits, and a plurality of micro LEDs disposed on the plurality of TFT layers. The TFT layer may further include a first metal layer on which a plurality of pixel circuits are formed, and a second metal layer on which the first metal layer is stacked at a distance. The TFT layer may further include three or more metal layers on which at least one GIP circuit is formed. The plurality of pixel circuits may include LTPS TFTs. The at least one GIP circuit may include an oxide TFT or an LTPS TFT. The plurality of pixel circuits and the at least one GIP circuit may include oxide TFTs. Drawings FIG. 1 is a diagram illustrating a display module in accordance with one or more embodiments; Fig. 2 is a diagram showing a pixel structure of a display module according to an embodiment of the present disclosure, and is a diagram enlarging a portion a shown in fig. 1; FIG. 3 is a diagram illustrating a circuit area disposed on a front surface of a display module in accordance with one or more embodiments; Fig. 4 is a diagram illustrating a plurality of pixel circuits and a plurality of gate-in-panel (GIP) circuits of a display module according to one or more embodiments, and is a diagram enlarging a portion B shown in fig. 3; fig. 5 is a diagram schematically illustrating a stacked structure of metal layers disposed on a TFT layer of a display module according to one or more embodiments; Fig. 6 is a cross-sectional view showing an example in which a pixel circuit provided on a TFT layer of a display module is composed of LTPS TFTs and a GIP circuit is composed of oxide TFTs according to one or more embodiments; FIG. 7 is a diagram illustrating an example in which some of a plurality of GIP circuits of a display module overlap with a plurality of pixel circuits in accordance with one or more embodiments; fig. 8 is a cross-sectional view illustrating an example in which all pixel circuits and GIP circuits provided on a TFT layer of a display module are composed of LTPS TFTs in accordance with one or more embodiments; FIG. 9 is a cross-sectional view illustrating an example