CN-121986579-A - In-situ sidewall passivation towards the bottom of high aspect ratio features

Abstract

A semiconductor processing method may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. The substrate may be accommodated within the processing region. Features may extend through one or more layers of material disposed on the substrate. The method can include forming plasma effluents of the silicon-containing precursor and the oxygen-containing precursor. The method may include contacting the substrate with the silicon-containing precursor and the plasma effluent of the oxygen-containing precursor. The contacting may form a silicon-and-oxygen-containing material on at least a bottom portion of the feature. The temperature in the processing region may be maintained at less than or about 0 ℃.

Inventors

• S. D. Sherpa
• I.Guo
• TAKESHITA KENJI
• RANJAN ALOK

Assignees

• 应用材料公司

Dates

Publication Date

20260505

Application Date

20240913

Priority Date

20230920

Claims (20)

1. 1. A method of semiconductor processing, comprising: providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein features extend through one or more material layers disposed on the substrate; Forming a plasma effluent of the silicon-containing precursor and the oxygen-containing precursor, and The substrate is contacted with the silicon-containing precursor and the plasma effluent of the oxygen-containing precursor, wherein the contacting forms a silicon-containing and oxygen-containing material on at least a bottom portion of the feature, and wherein the temperature in the processing region is maintained at less than or about 0 ℃.
2. 2. The semiconductor processing method of claim 1, wherein the silicon-containing precursor further comprises a halogen.
3. 3. The semiconductor processing method of claim 1, wherein the silicon-containing precursor comprises silicon tetrafluoride (SiF 4 ).
4. 4. The semiconductor processing method of claim 1, wherein the oxygen-containing precursor comprises diatomic oxygen (O 2 ).
5. 5. The semiconductor processing method of claim 1, wherein the feature is characterized by a depth of greater than or about 150nm.
6. 6. The semiconductor processing method of claim 1, wherein the one or more material layers comprise alternating layers of oxygen-containing material and nitrogen-containing material.
7. 7. The semiconductor processing method of claim 1, wherein the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor are formed at a plasma power of less than or about 2,000W.
8. 8. The semiconductor processing method of claim 1, further comprising: bias power is applied while the substrate is in contact with the silicon-containing precursor and the plasma effluents of the oxygen-containing precursor.
9. 9. The semiconductor processing method of claim 8, wherein the bias power is less than or about 2,500W.
10. 10. The semiconductor processing method of claim 1, further comprising: the features are etched in the substrate prior to providing the silicon-containing precursor and the oxygen-containing precursor to the processing region.
11. 11. A method of semiconductor processing, comprising: providing silicon-and halogen-containing precursors and oxygen-containing precursors to a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein features extend through one or more material layers disposed on the substrate; forming a plasma effluent of the silicon-and halogen-containing precursor and the oxygen-containing precursor, and The substrate is contacted with the silicon-and-halogen-containing precursor and the plasma effluent of the oxygen-containing precursor, wherein the contacting forms a silicon-and-halogen-containing material on at least a bottom portion of the feature.
12. 12. The semiconductor processing method of claim 11, wherein a flow rate ratio of the silicon-containing to halogen-containing precursor relative to the oxygen-containing precursor is greater than or about 10:1.
13. 13. The semiconductor processing method of claim 11, wherein the flow rate of the oxygen-containing precursor is less than or about 25 sccm.
14. 14. The semiconductor processing method of claim 11, wherein the silicon-oxygen-containing and halogen-containing material is formed in the same semiconductor processing chamber in which the feature is etched.
15. 15. The semiconductor processing method of claim 11, wherein the silicon-oxygen-containing and halogen-containing material is physically adsorbed on the feature.
16. 16. The semiconductor processing method of claim 11, wherein the temperature in the processing region is maintained at less than or about-20 ℃.
17. 17. The semiconductor processing method of claim 11, wherein the pressure in the processing region is maintained at less than or about 100 mTorr.
18. 18. A method of semiconductor processing, comprising: providing one or more etchant precursors to a processing region of a semiconductor processing chamber, wherein a substrate is contained within the processing region, and wherein the substrate comprises one or more layers of material; contacting the substrate with the one or more etchant precursors, wherein the contacting etches features into the one or more material layers; Stopping the flow of the one or more etchant precursors; providing a silicon-containing precursor and an oxygen-containing precursor to the processing region; Forming a plasma effluent of the silicon-containing precursor and the oxygen-containing precursor, and The substrate is contacted with the silicon-containing precursor and the plasma effluent of the oxygen-containing precursor, wherein the contacting forms a passivation material on at least a bottom portion of the feature, and wherein the temperature in the processing region is maintained at less than or about 0 ℃.
19. 19. The semiconductor processing method of claim 18, wherein said feature is characterized by a depth of greater than or about 300 nm.
20. 20. The semiconductor processing method of claim 18, wherein the passivation material comprises a silicon-oxygen and halogen-containing material.

Description

In-situ sidewall passivation towards the bottom of high aspect ratio features Technical Field The present application claims the benefit and priority of U.S. patent application Ser. No. 18/370,536, entitled "IN-SITU SIDEWALL PASSIVATION TOWARD THE BOTTOM OF HIGH ASPECT RATIO FEATURES," filed on 9 and 20 of 2023, the entire contents of which are incorporated herein by reference. The present technology relates to semiconductor systems and processes. More particularly, the present technology relates to sidewall passivation processes for high aspect ratio features. Background Integrated circuits may be fabricated by a process that produces a complex patterned layer of material on the substrate surface. Creating patterned material on a substrate requires a controlled method for removing the exposed material. Chemical etching is used for a variety of purposes, including transferring a pattern in a photoresist into an underlying layer, thinning a layer, or thinning the lateral dimensions of features already present on a surface. It is often desirable to have an etching process that etches one material faster than another material, thereby facilitating, for example, a pattern transfer process. Such an etching process is referred to as selective to the first material. Due to the variety of materials, circuits, and processes, etching processes have been developed that are selective to a variety of materials. As the aspect ratio of features etched into the material continues to increase, the etch may not form features having uniform dimensions. To address the problem of profile control, passivation materials may be used to protect the sidewalls of existing features during further etching. However, as the aspect ratio continues to increase, the passivation material may require additional processing operations and/or may plug features. Accordingly, there is a need for improved systems and methods that can be used to produce high quality components and structures. These and other needs are addressed by the present technology. Disclosure of Invention A semiconductor processing method may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. The substrate may be accommodated within the processing region. The features may extend through one or more layers of material disposed on the substrate. The method may include forming a silicon-containing precursor and a plasma effluent of the oxygen-containing precursor. The method may include contacting the substrate with a silicon-containing precursor and plasma effluents of an oxygen-containing precursor. The contact may form a silicon-and-oxygen-containing material on at least a bottom portion of the feature. The temperature in the processing region may be maintained at less than or about 0 ℃. In some embodiments, the silicon-containing precursor may further comprise a halogen. The silicon-containing precursor may be or include silicon tetrafluoride (SiF 4). The oxygen-containing precursor may be or include diatomic oxygen (O 2). The feature may be characterized by a depth of greater than or about 150 nm. The one or more material layers may be or include alternating layers of oxygen-containing material and nitrogen-containing material. Plasma effluents of the silicon-containing precursor and the oxygen-containing precursor can be formed at a plasma power of less than or about 2,000W. The method may include applying bias power while contacting the substrate with the silicon-containing precursor and plasma effluents of the oxygen-containing precursor. The bias power may be less than or about 2,500W. The method may include etching features in the substrate prior to providing the silicon-containing precursor and the oxygen-containing precursor to the processing region. Some embodiments of the present technology may cover semiconductor processing methods. The method may include providing silicon-containing and halogen-containing precursors to a processing region of a semiconductor processing chamber. The substrate may be accommodated within the processing region. The features may extend through one or more layers of material disposed on the substrate. The method may include forming plasma effluents of silicon-and halogen-containing precursors and oxygen-containing precursors. The method may include contacting the substrate with plasma effluents of a halogen-containing precursor and an oxygen-containing precursor. The contacting may form a silicon-oxygen-containing and halogen-containing material on at least a bottom portion of the feature. In some embodiments, the flow rate ratio of silicon-containing to halogen-containing precursor to oxygen-containing precursor may be greater than or about 10:1. The flow rate of the oxygen-containing precursor may be less than or about 25 sccm. Silicon-oxygen-containing and halogen-containing materials may be formed in the same semiconductor processing chambe