CN-121986597-A - Double sided circuit connection

Abstract

The semiconductor device includes a top side and a bottom side opposite the top side. A central portion comprising a semiconductor substrate is arranged between the top side and the bottom side. The component is arranged in the central portion in contact with the semiconductor substrate. The component includes a first electrical connection from the top side and a second electrical connection from the bottom side.

Inventors

• B. ANDERSON
• ZHU WENXI
• WANG JUNLI
• XIE RUILONG
• J. STRONG

Assignees

• 国际商业机器公司

Dates

Publication Date

20260505

Application Date

20240822

Priority Date

20230911

Claims (20)

1. 1. A semiconductor device, comprising: a top side and a bottom side opposite the top side; A central portion including a semiconductor substrate disposed between the top side and the bottom side, and A component disposed in the central portion on the semiconductor substrate, the component including a first electrical connection from the top side and a second electrical connection from the bottom side.
2. 2. The semiconductor device of claim 1, wherein the component comprises a gate structure, and the first electrical connection is connected to a top portion of the gate structure and the second electrical connection is connected to a bottom portion of the gate structure opposite the top portion.
3. 3. The semiconductor device of claim 1, wherein the top side comprises a metal structure that is symmetrical with respect to the bottom side.
4. 4. The semiconductor device according to claim 1, wherein the first electrical connection is connected to the second electrical connection across the central portion by a through contact.
5. 5. The semiconductor device of claim 1, wherein the component comprises an active region, and the first electrical connection is connected to a top portion of the active region and the second electrical connection is connected to a bottom portion of the active region opposite the top portion.
6. 6. The semiconductor device of claim 5, wherein the active region comprises a source/drain region of a transistor device.
7. 7. The semiconductor device of claim 5, wherein the active region comprises source/drain regions of a stacked field effect transistor device.
8. 8. A semiconductor device, comprising: A top side wiring including a metal line and a contact; A bottom side wiring including a metal line and a contact, and arranged opposite to the top side wiring; a central portion including a semiconductor substrate arranged between the top-side wiring and the bottom-side wiring, and And a member formed on the semiconductor substrate and arranged in the central portion, the member including a first electrical connection from the top-side wiring and a second electrical connection from the bottom-side wiring.
9. 9. The semiconductor device of claim 8, wherein the component comprises a gate structure, and the first electrical connection is connected to a top portion of the gate structure and the second electrical connection is connected to a bottom portion of the gate structure opposite the top portion.
10. 10. The semiconductor device of claim 9, wherein the top-side wiring and the bottom-side wiring comprise metal structures that are symmetrical with respect to each other.
11. 11. The semiconductor device according to claim 8, wherein the first electrical connection portion is connected to the second electrical connection portion through a through contact penetrating the semiconductor substrate across the central portion.
12. 12. The semiconductor device of claim 8, wherein the component comprises an active region, and the first electrical connection is connected to a top portion of the active region and the second electrical connection is connected to a bottom portion of the active region opposite the top portion.
13. 13. The semiconductor device of claim 12, wherein the active region comprises a source/drain region of a transistor device.
14. 14. The semiconductor device of claim 12, wherein the active region comprises a source/drain region of a stacked field effect transistor device.
15. 15. The semiconductor device according to claim 8, wherein the top-side wiring is in mirror image relation to the bottom-side wiring with respect to the central portion.
16. 16. The semiconductor device of claim 8, wherein the topside routing is in mirror image relationship to the bottom side routing in three dimensions.
17. 17. A semiconductor device, comprising: A top side wiring including a metal line and a contact; A bottom side wiring including a metal line and a contact, and arranged opposite to the top side wiring; A central portion including a semiconductor substrate arranged between the top-side wiring and the bottom-side wiring; a first member formed on the semiconductor substrate and arranged in the central portion, the first member including a first electrical connection from the top-side wiring and a second electrical connection from the bottom-side wiring; a second member formed on the semiconductor substrate and arranged in the central portion, the second member including a first electrical connection from the top-side wiring and a second electrical connection from the bottom-side wiring, and And a bridge connecting the first electrical connection of the first component to the first electrical connection of the second component.
18. 18. The semiconductor device of claim 17, wherein the first component comprises a gate structure, and the first electrical connection is connected to a top portion of the gate structure and the second electrical connection is connected to a bottom portion of the gate structure opposite the top portion.
19. 19. The semiconductor device of claim 17, wherein the first electrical connection is connected to the second electrical connection through a respective through contact through the semiconductor substrate across the central portion.
20. 20. The semiconductor device of claim 17, wherein the second component comprises an active region, and the first electrical connection is connected to a top portion of the active region, and the second electrical connection is connected to a bottom portion of the active region opposite the top portion.

Description

Double sided circuit connection Background The present invention relates generally to semiconductor devices and processing methods, and more particularly to semiconductor devices having front and back side wiring for double sided connections that contact the device or device component from opposite sides. Integrated circuit devices are constructed by forming diffusion regions in a substrate and then constructing wiring connections from the substrate to back end of line (BEOL) structures. Such devices have diffusion regions (e.g., source/drain regions) on one side of the device formed in the substrate, and contacts are deposited (drop down) to connect with the diffusion regions. The metal lines are connected to the contacts and themselves are connected by other contacts and metal lines to form metal structures according to the chip design. In the case of a stacked field effect transistor structure in which field effect transistors are stacked on each other, the device is built again from the substrate. Even if the wafer or substrate is flipped to process the opposite side, the contacts are deposited toward the substrate. In devices employing large stacked gate structures, such as in nano-sheet stacks, gate resistance limits the switching capability of the transistor controlled by the gate because of the large size of the gate, such as the large distance between the top and bottom of the gate. The distal bottom of the gate introduces a gate resistance due to contact with the top of the large gate structure. The asymmetry of the metal structure with respect to the substrate may result in parasitic resistance and wiring resistance across the chip or device. Thus, a more balanced wiring arrangement is needed to address gate resistance issues, area constraints, and parasitic losses in integrated circuits. It is also desirable to make multiple connections to the same component to reduce the contact resistance and current density through the connecting metal structures. Disclosure of Invention According to an embodiment of the present invention, a semiconductor device includes a top side and a bottom side opposite the top side. The central portion includes a semiconductor substrate disposed between the top side and the bottom side. The member disposed in the central portion is in contact with the semiconductor substrate. The component includes a first electrical connection from the top side and a second electrical connection from the bottom side. By using first and second electrical connections to the component, the resistance due to insufficient connection surface area is reduced. As a result of using the dual connection, such problems as gate resistance or contact resistance are greatly reduced. Furthermore, using another wiring side according to embodiments of the present invention opens up many possibilities in terms of circuit layout, saving area space and reducing the current density through the electrical connection. According to another embodiment of the present invention, a semiconductor device includes a top-side wiring including a metal line and a contact, and a bottom-side wiring including a metal line and a contact and disposed opposite the top-side wiring. The central portion includes a semiconductor substrate disposed between the top-side wiring and the bottom-side wiring. The component is formed on the semiconductor substrate and arranged in the central portion. The component includes a first electrical connection from the topside routing and a second electrical connection from the bottom side routing. The first and second electrical connections may reduce resistance due to insufficient connection surface area. As the resistance is greatly reduced, device performance is improved. Furthermore, using another wiring side according to embodiments of the present invention opens up many possibilities in terms of circuit layout, saving area space and reducing the current density through the electrical connection. According to another embodiment of the present invention, a semiconductor device includes a top-side wiring including a metal line and a contact, and a bottom-side wiring including a metal line and a contact and disposed opposite the top-side wiring. The central portion includes a semiconductor substrate disposed between the top-side wiring and the bottom-side wiring. The first member is formed on the semiconductor substrate and is arranged in the central portion. The first component includes a first electrical connection from the topside routing and a second electrical connection from the bottom side routing. The second member is formed on the semiconductor substrate and is arranged in the central portion. The second component includes a first electrical connection from the topside routing and a second electrical connection from the bottom side routing. In addition to reducing the resistance, the bridge member connects the first electrical connection of the first component to the first electrical