CN-121986601-A - Power semiconductor device and method for manufacturing power semiconductor device

Abstract

The bonding strength between copper and the hard resin is improved, and the contact resistance at the time of bus bar mounting is not increased. The power semiconductor device (7) is provided with an insulating substrate (1), a case (3) that houses the insulating substrate (1), copper wiring (11) that is formed on the insulating substrate (1), a semiconductor chip (42) that is connected to the copper wiring (11), and copper terminals (31) that reach the upper end of the case (3). The copper wiring (11) is joined to the copper terminal (31), a nut (32) provided in a component of the housing (3) is in contact with the copper terminal (31), and an oxide film having a thickness of 15nm to 100nm is formed on the surface of the copper wiring (11).

Inventors

• KUMAGAI YUKIHIRO
• KUSHIMA TAKAYUK
• HAYAKAWA SEIICHI
• He Kangjia

Assignees

• 美蓓亚功率半导体株式会社

Dates

Publication Date

20260505

Application Date

20240926

Priority Date

20231004

Claims (11)

1. 1. A semiconductor device is characterized by comprising: An insulating substrate; A case accommodating the insulating substrate; copper wiring formed on the insulating substrate; A semiconductor chip connected to the copper wiring, and Copper terminals reaching the upper end of the housing, The copper wiring is bonded to the copper terminal, A heat capacity body provided to a component of the case is in contact with the copper terminal, An oxide film having a thickness of 15nm to 100nm is formed on the surface of the copper wiring, and is further covered with a hard resin.
2. 2. The semiconductor device according to claim 1, wherein, The heat capacity body is a nut reaching an upper end of the housing.
3. 3. The semiconductor device according to claim 1, wherein, The oxide film formed on the copper wiring is thicker than the oxide film formed on the opposite surface of the contact portion of the heat capacity body in the copper terminal.
4. 4. The semiconductor device according to claim 1, wherein, The copper wiring and the copper terminal are ultrasonically bonded.
5. 5. The semiconductor device according to claim 1, wherein, The copper wiring is solder-bonded to the copper terminal.
6. 6. The semiconductor device according to claim 1, wherein, An oxide film is not formed at a portion of the copper wiring to which the semiconductor chip is connected.
7. 7. A method for manufacturing a semiconductor device, characterized in that, The semiconductor device includes: An insulating substrate; A case accommodating the insulating substrate; copper wiring formed on the insulating substrate; A semiconductor chip connected to the copper wiring; a heat-capacity body provided on a component of the housing, and Copper terminals reaching the upper end of the housing and contacting the heat capacity body, The following steps are performed on the semiconductor device: Bonding the copper wire to the copper terminal; And performing a heat treatment from the underside of the insulating substrate And filling a hard resin in the shell, and covering the insulating substrate and the semiconductor chip with the hard resin.
8. 8. The method for manufacturing a semiconductor device according to claim 7, wherein, The semiconductor device is configured by connecting the semiconductor chip to the copper wiring without forming an oxide film on the copper wiring.
9. 9. The method for manufacturing a semiconductor device according to claim 7, wherein, The semiconductor device is configured by electrically connecting the semiconductor chip to the copper wiring via a wire in a state where an oxide film is not formed on the copper wiring.
10. 10. The method for manufacturing a semiconductor device according to claim 9, wherein, And ultrasonically bonding the copper wiring to the copper terminal.
11. 11. The method for manufacturing a semiconductor device according to claim 7, wherein, And solder-bonding the copper wiring with the copper terminal.

Description

Power semiconductor device and method for manufacturing power semiconductor device Technical Field The present invention relates to a power semiconductor device and a method for manufacturing the power semiconductor device. Background Due to electromechanical integration in recent years, shock resistance and heat resistance required for a power semiconductor device are becoming strict. In addition, as a sealing material for a package of a power semiconductor device, hard resin has been studied instead of conventional gel. Prior patent literature Patent literature Patent document 1 Japanese patent laid-open publication No. 2017-010985 Disclosure of Invention Problems to be solved by the invention When a temperature cycle test is performed on a power semiconductor device sealed with a hard resin, the hard resin (epoxy resin) peels off from the copper wiring of the insulating substrate due to thermal stress. The peeling of the epoxy resin from the copper wiring gradually progresses with the number of cycles of temperature cycle. When the semiconductor chip is mounted on the copper wiring and peeled off, excessive stress is generated on the semiconductor chip, and the semiconductor chip breaks, which is a problem. One of the countermeasures is to improve the adhesion strength between copper and epoxy. One method of improving the adhesion strength of copper to epoxy is oxidation of the copper surface. Patent document 1 describes an invention of a semiconductor device and a method for manufacturing the semiconductor device, which can improve adhesion between a sealing material and each member. However, oxidation of the copper surface has problems such as a problem of solder bonding resistance, a problem of ultrasonic welding of copper terminals during manufacturing of the power semiconductor device, and a problem of an increase in contact resistance during bus bar mounting due to an oxide film on the copper surface. Accordingly, an object of the present invention is to improve the adhesion strength between a hard resin and copper without increasing the contact resistance at the time of mounting a bus bar. Solution scheme In order to solve the above problems, the semiconductor device of the present invention is characterized by comprising an insulating substrate, a case accommodating the insulating substrate, copper wiring formed on the insulating substrate, a semiconductor chip connected to the copper wiring, and a copper terminal reaching an upper end of the case, wherein the copper wiring is bonded to the copper terminal, a heat capacity body provided in a component of the case is in contact with the copper terminal, and an oxide film having a thickness of 15nm to 100nm is formed on a surface of the copper wiring and is covered with a hard resin. The method for manufacturing a semiconductor device is characterized by comprising an insulating substrate, a case accommodating the insulating substrate, copper wiring formed on the insulating substrate, a semiconductor chip connected to the copper wiring, a heat capacity body provided on a component of the case, and a copper terminal reaching an upper end of the case and contacting the heat capacity body, wherein the semiconductor device is subjected to a step of bonding the copper wiring to the copper terminal, a step of heating the insulating substrate from a lower side thereof, and a step of filling a hard resin into the case and covering the insulating substrate and the semiconductor chip with the hard resin. Other means will be described in the mode for carrying out the invention. Effects of the invention According to the present invention, the adhesion strength between the hard resin and copper can be improved without increasing the contact resistance at the time of mounting the bus bar. Drawings Fig. 1 is a cross-sectional view showing copper wiring of an insulating substrate. Fig. 2 is a cross-sectional view showing a semiconductor chip connected to a copper wire. Fig. 3 is a cross-sectional view showing a case in which a copper terminal is connected to a copper wire of an insulating substrate. Fig. 4 is a cross-sectional view showing a power semiconductor device in which the inside is sealed with an epoxy resin. Fig. 5 is a flowchart of the power semiconductor device of the first embodiment. Fig. 6 is a graph showing a relationship between a film thickness and an oxidation treatment time. Fig. 7 is a graph showing the relationship between the shear strength and the oxidation treatment time. Fig. 8 is a flowchart of a power semiconductor device of the second embodiment. Detailed Description Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. First embodiment Fig. 1to 4 show cross-sectional views of the power semiconductor device 7 at each manufacturing step. Fig. 5 is a flowchart showing a method of manufacturing the power semiconductor device 7 according to the first embodiment. Each ste