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CN-121995110-A - Wafer level device testing apparatus

CN121995110ACN 121995110 ACN121995110 ACN 121995110ACN-121995110-A

Abstract

The present disclosure provides a wafer level device testing apparatus. The device comprises a pin card, a power supply protection module, a driving protection module, a load module, a current acquisition module and an oscilloscope, wherein the power supply is used for being connected to a tested device, the power supply is used for providing an electric signal, the power supply protection module is electrically connected between the power supply and the pin card and used for providing a drain electrode driving signal to the tested device based on the electric signal, the power supply protection module is used for providing a drain electrode driving signal to the tested device based on the electric signal, the driving protection module is electrically connected between the power supply protection module and the pin card and used for being connected to the load device, the current acquisition module is electrically connected between the pin card and the ground and used for acquiring drain-source current, the clamping module is electrically connected with the pin card and used for extracting clamping drain-source voltage from the drain electrode driving signal, and the oscilloscope is respectively electrically connected with the current acquisition module and the clamping module and used for measuring dynamic on-resistance through the drain-source current and the clamping drain-source voltage.

Inventors

  • ZHANG ZHONGYU

Assignees

  • 京东方华灿光电(广东)有限公司

Dates

Publication Date
20260508
Application Date
20251223

Claims (10)

  1. 1. A wafer level device testing apparatus, the apparatus comprising: a needle card (100) for accessing a device under test; A power supply (101) for providing an electrical signal; A power supply protection module (102) electrically connected between the power supply (101) and the pin card (100) for providing a drain driving signal to the device under test based on the electrical signal and stopping providing the drain driving signal to the device under test when the device under test is broken down or shorted; a drive protection module (103) electrically connected between the power supply (101) and the pin card (100) for providing a gate drive signal to the device under test based on the electrical signal; A load module (104) electrically connected between the power supply protection module (102) and the pin card (100) for accessing a load device; The current acquisition module (105) is electrically connected between the needle card (100) and the ground and is used for acquiring the drain-source current of the tested device; The clamping module (106) is electrically connected with the pin card (100) and is used for extracting clamping drain-source voltage of the tested device from the drain driving signal; And the oscilloscope (107) is respectively and electrically connected with the current acquisition module (105) and the clamping module (106) and is used for measuring the dynamic on-resistance of the tested device through the drain-source current of the tested device and the clamping drain-source voltage of the tested device.
  2. 2. The device according to claim 1, further comprising a test circuit board (10) and a power circuit board (20), the test circuit board (10) and the power circuit board (20) being electrically connected through a port; the test circuit board (10) comprises a needle card port (11) and an oscilloscope port (12), the needle card (100) is electrically connected with the test circuit board (10) through the needle card port (11), and the oscilloscope (107) is electrically connected with the test circuit board (10) through the oscilloscope port (12); The drive protection module (103), the load module (104), the current acquisition module (105) and the clamping module (106) are positioned on the test circuit board (10); The power supply protection module (102) is located on the power supply circuit board (20), and the power supply circuit board (20) is electrically connected with the power supply (101).
  3. 3. The apparatus of claim 2, wherein the pin card port (11) comprises a drain power input pin (1), a drain detection pin (2), a null pin (3), 2 gate signal control pins (4), a source detection pin (5), and a source power input pin (6); The drain power input pin (1) and the source power input pin (6) are positioned at two ends; The drain detection pin (2), the empty pin (3), the 2 gate signal control pins (4) and the source detection pin (5) are located between the drain power input pin (1) and the source power input pin (6); the drain detection pins (2), the empty pins (3) and the source detection pins (5) are arranged in one row, and the 2 gate signal control pins (4) are arranged in another row.
  4. 4. A device according to claim 3, characterized in that the oscilloscope ports (12) include a drain-source current port Ids and a clamp drain-source voltage port vds_ramp; the apparatus further includes an oscilloscope protection module (108) electrically connected between the clamp drain-source voltage port vds_ramp and the source power input pin (6).
  5. 5. The apparatus of claim 3, wherein the power protection module (102) comprises a first isolated gate driver (121), a reset circuit (122), a PWM control loop (123), an enable circuit (124), and an LED hint circuit (125); The first isolation gate driver (121) is electrically connected between the power supply (101) and the drain power input pin (1), and the reset circuit (122), the PWM control loop (123), the enable circuit (124) and the LED prompt circuit (125) are electrically connected with the first isolation gate driver (121) respectively.
  6. 6. A device according to claim 3, characterized in that the load module (104) comprises: A diode D1, wherein the anode of the diode D1 is electrically connected with the drain power input pin (1), and the cathode of the diode D1 is electrically connected with the power supply protection module (102); An inductance or resistance (141) is connected in parallel with the diode D1.
  7. 7. A device according to claim 3, characterized in that the clamping module (106) comprises: -a MOSFET (161), a drain of the MOSFET (161) being electrically connected to the drain power input pin (1), a source of the MOSFET (161) being electrically connected to the clamp drain-source voltage port vds_ramp; a capacitor C12 electrically connected between the drain and the gate of the MOSFET (161); a resistor R13 electrically connected between the drain and the gate of the MOSFET (161); A second isolated gate driver (162) electrically connected between the power supply (101) and the gate of the MOSFET (161).
  8. 8. The apparatus according to any one of claims 3 to 7, further comprising: A first RC filter circuit (109) is electrically connected between the clamp drain-source voltage port vds_ramp and the source power input pin (6).
  9. 9. The apparatus according to any one of claims 3 to 7, further comprising: And a protection diode D2, wherein the anode of the protection diode D2 is electrically connected with the source power input pin (6), and the cathode of the protection diode D2 is electrically connected with the clamping drain-source voltage port Vds_champ.
  10. 10. The apparatus according to any one of claims 1 to 7, further comprising: and the second RC filter circuit (110) is electrically connected between the output end of the power supply protection module (102) and the ground.

Description

Wafer level device testing apparatus Technical Field The disclosure relates to the field of testing technology, and in particular, to a wafer level device testing apparatus. Background Gallium nitride transistors are popular in the power electronics field for their advantages of high power and low loss. In the design process, the phenomenon of dynamic on-resistance change of the gallium nitride transistor is one of the more important problems affecting the research and development of the gallium nitride transistor. In order to accurately measure the change of the dynamic on-resistance under different stress conditions, a plurality of test platforms aiming at the dynamic on-resistance are all device package post-test. However, the packaging of gallium nitride transistors is required for post-packaging testing, resulting in a loss of packaging time and cost during testing. Disclosure of Invention The embodiment of the disclosure provides a wafer-level device testing device which can test a wafer-level device. The technical scheme is as follows: In one aspect, there is provided a wafer level device testing apparatus, the apparatus comprising: the needle card is used for accessing the tested device; A power supply for providing an electrical signal; The power supply protection module is electrically connected between the power supply and the pin card and is used for providing a drain electrode driving signal for the device to be tested based on the electric signal and stopping providing the drain electrode driving signal for the device to be tested when the device to be tested is broken down or short-circuited; the drive protection module is electrically connected between the power supply and the pin card and is used for providing a grid drive signal for the tested device based on the electric signal; the load module is electrically connected between the power supply protection module and the pin card and is used for accessing a load device; The current acquisition module is electrically connected between the needle card and the ground and is used for acquiring the drain-source current of the tested device; the clamping module is electrically connected with the pin card and is used for extracting clamping drain-source voltage of the tested device from the drain driving signal; And the oscilloscope is respectively and electrically connected with the current acquisition module and the clamping module and is used for measuring the dynamic on-resistance of the tested device through the drain-source current of the tested device and the clamping drain-source voltage of the tested device. Optionally, the device further comprises a test circuit board and a power supply circuit board, wherein the test circuit board and the power supply circuit board are electrically connected through a port; the test circuit board comprises a needle card port and an oscilloscope port, the needle card is electrically connected with the test circuit board through the needle card port, and the oscilloscope is electrically connected with the test circuit board through the oscilloscope port; The driving protection module, the load module, the current acquisition module and the clamping module are positioned on the test circuit board; the power supply protection module is located on the power supply circuit board, and the power supply circuit board is electrically connected with the power supply. Optionally, the pin card port includes a drain power input pin, a drain detection pin, a null pin, 2 gate signal control pins, a source detection pin, and a source power input pin; the drain power input pin and the source power input pin are positioned at two ends; The drain detection pin, the null pin, the 2 gate signal control pins, and the source detection pin are located between the drain power input pin and the source power input pin; the drain detection pins, the empty pins, and the source detection pins are arranged in one row, and the 2 gate signal control pins are arranged in another row. Optionally, the oscilloscope ports include a drain-source current port and a clamp drain-source voltage port; the device also comprises an oscilloscope protection module electrically connected between the clamping drain-source voltage port and the source power input pin. Optionally, the power supply protection module comprises a first isolation grid driver, a reset circuit, a PWM control loop, an enabling circuit and an LED prompt circuit; the first isolation gate driver is electrically connected between the power supply and the drain power input pin, and the reset circuit, the PWM control loop, the enabling circuit and the LED prompt circuit are electrically connected with the first isolation gate driver respectively. Optionally, the load module includes: the anode of the diode D1 is electrically connected with the drain power input pin, and the cathode of the diode D1 is electrically connected with the power supply protection module; An inductance or resi