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CN-121995572-A - On-chip integrated interconnection structure

CN121995572ACN 121995572 ACN121995572 ACN 121995572ACN-121995572-A

Abstract

The invention provides an on-chip integrated interconnection structure which comprises a calculation module, a plurality of photoelectric co-packaging modules and a coarse wavelength division multiplexer, wherein the calculation module, the photoelectric co-packaging modules and the coarse wavelength division multiplexer are integrated on the same substrate, the photoelectric co-packaging modules and the coarse wavelength division multiplexer are stacked around the calculation module, the calculation module and the photoelectric co-packaging modules are electrically interconnected through a rewiring layer, and the photoelectric co-packaging modules and the coarse wavelength division multiplexer are optically interconnected through a polymer waveguide. The on-chip integrated interconnection structure is formed by interconnecting and packaging the photoelectric co-packaging module, the coarse wavelength division multiplexer and the computing module, so that the integrated optical communication module for light in and light out is realized, the photoelectric co-packaging module and the coarse wavelength division multiplexer are connected by adopting the polymer waveguide, the condition of limited packaging density caused by the volume limitation of the conventional optical fiber interconnection is solved by the small scale of the polymer waveguide, and the packaging density is effectively improved.

Inventors

  • ZHU YULIN

Assignees

  • 联光元和(上海)企业发展有限公司

Dates

Publication Date
20260508
Application Date
20260408

Claims (10)

  1. 1. The on-chip integrated interconnection structure is characterized by comprising a calculation module, a plurality of photoelectric co-packaging modules and a coarse wavelength division multiplexer, wherein the calculation module, the photoelectric co-packaging modules and the coarse wavelength division multiplexer are integrated on the same substrate, the photoelectric co-packaging modules are stacked around the calculation module, the calculation module and the photoelectric co-packaging modules are electrically interconnected through a rewiring layer, and the photoelectric co-packaging modules and the coarse wavelength division multiplexer are optically interconnected through a polymer waveguide.
  2. 2. The integrated interconnection structure on a chip of claim 1, wherein each of the optoelectronic co-package modules has a plurality of waveguide ports arranged vertically with respect to the substrate, the coarse wavelength division multiplexer is a multi-layer structure, and the number of layers is equal to the number of waveguide ports of each of the optoelectronic co-package modules.
  3. 3. The integrated interconnection structure on a chip of claim 2, wherein the polymer waveguides are multi-layer structures, each layer of which connects waveguide ports of the optoelectronic co-package modules at the same layer therewith, and each layer of which simultaneously connects ports of the coarse wavelength division multiplexer at the same layer therewith.
  4. 4. The integrated interconnection structure on a chip of claim 2, wherein a focusing lens is disposed between the polymer waveguide and the waveguide port of the optoelectronic co-package module.
  5. 5. The integrated interconnection structure on a chip of claim 4, wherein a focusing lens is also provided between the polymer waveguide and the port of the coarse wavelength division multiplexer.
  6. 6. The integrated interconnection structure on a chip according to claim 4 or 5, wherein the focusing lens is formed by two-photon 3D printing, and the size of the focusing lens is 10 μm to 20 μm.
  7. 7. The integrated on-chip interconnect structure of claim 3, wherein each layer of the polymer waveguide is formed by etching on a single layer of polymer, or by laser-induced, or by two-photon 3D printing.
  8. 8. The integrated on-chip interconnect structure of claim 1, wherein the plurality of optoelectronic co-package modules are divided into a plurality of groups, a stacking direction of each group of optoelectronic co-package modules is parallel to a surface of the substrate, and a plane of each optoelectronic co-package module is perpendicular to the surface of the substrate.
  9. 9. The integrated on-chip interconnect structure of claim 8, wherein the substrate is provided with a fixed slot, and the optoelectronic co-package module is inserted into the slot to be mounted on the substrate.
  10. 10. The integrated on-chip interconnect structure of claim 1, wherein the plurality of optoelectronic co-package modules are divided into a plurality of groups, a stacking direction of each group of optoelectronic co-package modules is perpendicular to a surface of the substrate, and a plane of each optoelectronic co-package module is parallel to the surface of the substrate.

Description

On-chip integrated interconnection structure Technical Field The invention belongs to the technical field of photoelectric chip packaging, and particularly relates to an on-chip integrated interconnection structure which has the characteristics of high integration and miniaturization. Background In the current optical communication various components and interconnection schemes, most of the optical communication various components and interconnection schemes are single modules responsible for a single task, so that the number of modules which can be accommodated in a unit area is greatly limited. In recent years, although the integration of optical chips and electrical chips has been performed to increase the number of chips that can be integrated in a unit area, in the mode of connection of optical fibers, copper cables, and other tangible carriers, the interconnected carriers still occupy a considerable part of space. As the requirements for the transmission rate, bandwidth and energy efficiency of the optical module are increasing. For multichannel optical transceiver, the packaging requirements of higher integration level and higher density are still the key direction in the current optical communication field. Because the area of the package on the chip is fixed, all modules and interconnection wiring among the modules are required to be performed in a limited space, and optical fibers are adopted as the interconnection wiring of optical signals in a plurality of schemes. For example, patent document CN115542478a discloses that an external optical fiber for optically interconnecting the three-dimensional package structure with an external device can be provided on the upper surface of the optoelectronic chip, patent document CN118938408a discloses that an optical fiber can be employed as an optical waveguide, and so on. However, in the scheme of implementing interconnection by using optical fibers, the routing of the optical fibers occupies a considerable portion of space, resulting in an inherent physical upper limit of the modules that can be interconnected, and thus in a lower integration level and density. And the optical waveguides with other small sizes are adopted for interconnection, so that the manufacturing difficulty is high, the optical waveguides are more fragile, and the optical waveguides are difficult to apply to large-scale integration scenes. Disclosure of Invention The invention aims to provide an on-chip integrated interconnection structure so as to realize light in and light out and realize high integration. In order to achieve the above purpose, the invention provides an on-chip integrated interconnection structure, which comprises a calculation module, a plurality of photoelectric co-packaging modules and a coarse wavelength division multiplexer, wherein the calculation module, the photoelectric co-packaging modules and the coarse wavelength division multiplexer are integrated on the same substrate, the photoelectric co-packaging modules and the coarse wavelength division multiplexer are stacked around the calculation module to realize electrical interconnection through a rewiring layer, and the photoelectric co-packaging modules and the coarse wavelength division multiplexer are connected through a polymer waveguide. Further, each of the optoelectronic co-packaging modules has a plurality of waveguide ports vertically arranged relative to the substrate, the coarse wavelength division multiplexer has a multilayer structure, and the number of layers is equal to the number of waveguide ports of each of the optoelectronic co-packaging modules. Further, the polymer waveguide is a multi-layer structure, each layer of which connects waveguide ports of the optoelectronic co-package module at the same layer therewith, and each layer of which simultaneously connects ports of the coarse wavelength division multiplexer at the same layer therewith. Further, a focusing lens is arranged between the polymer waveguide and the waveguide port of the photoelectric co-packaging module. Further, a focusing lens is also arranged between the polymer waveguide and the port of the coarse wavelength division multiplexer. Further, the focusing lens is formed by two-photon 3D printing, and the size of the focusing lens is 10-20 mu m. Further, each layer of the polymer waveguide is formed by etching on a single layer of polymer, or by laser induction, or by two-photon 3D printing. Further, the plurality of photoelectric co-packaging modules are divided into a plurality of groups, the stacking direction of each group of photoelectric co-packaging modules is parallel to the surface of the substrate, and the plane of each photoelectric co-packaging module is perpendicular to the surface of the substrate. Further, a fixed slot is formed in the substrate, and the optoelectronic co-packaging module is inserted into the slot to be mounted on the substrate. Further, the plurality of photoelectric co-packaging module