CN-121995675-A - Display panel and array substrate thereof

Abstract

The invention provides a display panel and an array substrate thereof, wherein the array substrate comprises a substrate and a plurality of pixel units, the substrate is provided with two surfaces which are parallel and opposite to each other, the plurality of pixel units are arranged on the substrate, at least one of the plurality of pixel units comprises an active element, a reflecting structure and an insulating structure, the reflecting structure is provided with an overlapped reflecting layer and a pixel electrode, the reflecting structure is adjacent to one of the two surfaces of the substrate, the insulating structure is arranged around the active element, the insulating structure is provided with at least one guide hole, and the active element and the pixel electrode are mutually and electrically connected through the at least one guide hole. Therefore, the influence of the manufacturing process on the manufacturing quality of the reflecting layer can be effectively reduced.

Inventors

• JIAO YOUQI
• CHEN YITONG
• HUANG ZHIJIE
• LUO SHIZHONG
• Wu Jiongzhang

Assignees

• 瀚宇彩晶股份有限公司

Dates

Publication Date

20260508

Application Date

20241101

Claims (20)

1. 1. An array substrate, comprising: a substrate having two surfaces parallel to each other, and A plurality of pixel units are disposed on the substrate, at least one of the plurality of pixel units including: An active element; a reflective structure having an overlapped reflective layer and pixel electrode, wherein the reflective structure is adjacent to one of the two surfaces of the substrate, and The insulation structure is arranged around the active element and is provided with at least one guide connection hole, and the active element and the pixel electrode are electrically connected with each other through the at least one guide connection hole.
2. 2. The array substrate of claim 1, wherein the pixel electrode is disposed on a side of the reflective layer facing the active element.
3. 3. The array substrate of claim 1, wherein the active element comprises a semiconductor layer, a gate electrode, a source electrode and a drain electrode, wherein the semiconductor layer is overlapped with the gate electrode and insulated from each other, the source electrode is electrically connected to the semiconductor layer, and the drain electrode is electrically connected to the semiconductor layer and the pixel electrode.
4. 4. The array substrate of claim 1, wherein the active element comprises a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, the semiconductor layer and the gate electrode being disposed to overlap and to be insulated from each other, the semiconductor layer electrically connecting the source electrode and the drain electrode, wherein the drain electrode is electrically connected to the pixel electrode, and the drain electrode and the reflective layer are disposed on the same layer.
5. 5. The array substrate of claim 3 or 4, wherein the semiconductor layer comprises Indium Gallium Zinc Oxide (IGZO) or Low Temperature Polysilicon (LTPS).
6. 6. The array substrate of claim 1, wherein the active element comprises a metal layer and an amorphous silicon (a-Si) semiconductor which are overlapped and insulated from each other, the metal layer comprises a gate electrode and the reflective layer which are insulated from each other, the gate electrode and the amorphous silicon semiconductor are overlapped in a projection range of the substrate, and a source electrode and a drain electrode are disposed on opposite sides of the amorphous silicon semiconductor, the source electrode and the drain electrode are respectively electrically connected to the amorphous silicon semiconductor, and the drain electrode is electrically connected to the pixel electrode.
7. 7. The array substrate of claim 1, wherein the reflective layer is disposed on a side of the substrate away from the active device, the substrate has a through hole, the through hole is in communication with the at least one conductive via, and the active device and the pixel electrode are electrically connected to each other through the at least one conductive via and the through hole.
8. 8. The array substrate of claim 7, wherein the active element comprises a semiconductor layer and a gate electrode, wherein the semiconductor layer has a source electrode and a drain electrode disposed on opposite sides thereof, the source electrode and the drain electrode being electrically connected to the semiconductor layer, respectively, the gate electrode and the semiconductor layer being within a projection range of the substrate.
9. 9. The array substrate of claim 1, wherein a buffer layer is disposed between the reflective structure and the substrate.
10. 10. The array substrate of claim 9, wherein the buffer layer comprises at least two buffer films stacked.
11. 11. The array substrate of claim 9, wherein a side of the reflective structure remote from the substrate is provided with a protective layer.
12. 12. The array substrate of claim 11, wherein the protective layer comprises a light transmissive material comprising a silicon-based compound, aluminum oxide (AlxOy), or a combination thereof, wherein the silicon-based compound comprises one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiOxNy).
13. 13. The array substrate of claim 9, wherein the buffer layer comprises a conductive material comprising Indium Tin Oxide (ITO), indium Zinc Oxide (IZO), molybdenum (Mo), aluminum (Al), titanium (Ti), molybdenum oxide (MoOx), aluminum oxide (AlOx), titanium oxide (TiOx), molybdenum aluminide (MoAl), or a combination thereof.
14. 14. The array substrate of claim 1, wherein the reflective layer comprises a metallic material comprising one of silver and aluminum.
15. 15. The array substrate of claim 1, wherein the reflective layer has a thickness greater than 900 angstroms
16. 16. The array substrate of claim 15, wherein the reflective layer has a thickness ranging from 900 angstroms to 1200 angstroms.
17. 17. The array substrate of claim 1, wherein one side of the reflective layer has a surface microstructure.
18. 18. The array substrate of claim 1, wherein the insulating structure comprises a plurality of insulating material layers disposed in a stacked manner, the plurality of insulating material layers comprising an inorganic material comprising silicon oxide (SiO 2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), or a combination thereof.
19. 19. A display panel, comprising: An array substrate; A color film substrate arranged opposite to the array substrate, and The display medium layer is arranged between the array substrate and the color film substrate; The array substrate comprises a substrate and a plurality of pixel units, wherein the substrate is provided with two surfaces which are parallel and opposite to each other, the pixel units are arranged on the substrate, at least one of the pixel units comprises an active element, a reflecting structure and an insulating structure, the reflecting structure is provided with an overlapped reflecting layer and a pixel electrode, the reflecting structure is adjacently arranged on one of the two surfaces of the substrate, the insulating structure is arranged around the active element, the insulating structure is provided with at least one guide hole, and the active element and the pixel electrode are electrically connected with each other through the at least one guide hole.
20. 20. The display panel of claim 19, wherein the pixel electrode is disposed on a side of the substrate facing the display medium layer, the active element is disposed on a side of the substrate facing away from the display medium layer, the substrate has a through hole, the through hole is in communication with the at least one conductive via, and the active element and the pixel electrode are electrically connected to each other through the at least one conductive via and the through hole.

Description

Display panel and array substrate thereof Technical Field The present invention relates to a display device, and more particularly, to a display panel and an array substrate thereof suitable for a reflective display. Background Liquid crystal panels (LCD panels) can be broadly classified into transmissive (TRANSMISSIVE TYPE) liquid crystal panels, reflective (REFLECTIVE TYPE) liquid crystal panels, and transflective (TRANS REFLECTIVE TYPE) liquid crystal panels. The reflective liquid crystal panel has a reflective layer to reflect incident ambient light to display a picture, and the reflective layer has a high reflection performance in a visible spectrum range, and the surface of the reflective layer has both a flat and smooth characteristic to maintain stability and reliability of a light reflection process. In the past, although some related techniques, such as improving the flatness and smoothness of the reflective layer, do not consider the interference between adjacent layers during the manufacturing process, and still have the influence on the manufacturing quality. In view of the foregoing, it is necessary to provide a solution to the problems of the prior art. Disclosure of Invention The invention aims to provide a display panel and an array substrate thereof, so as to effectively reduce the influence of a manufacturing process on the manufacturing quality of a reflective film layer. The main objective of the present invention is to provide a display structure, which can further improve the resolution and/or the color gamut space by a specific pixel arrangement mode. In order to achieve the above object, an aspect of the present invention provides an array substrate, which comprises a substrate having two surfaces parallel to each other, and a plurality of pixel units disposed on the substrate, wherein at least one of the plurality of pixel units comprises an active element, a reflective structure having an overlapped reflective layer and a pixel electrode, wherein the reflective structure is adjacent to one of the two surfaces of the substrate, and an insulating structure disposed around the active element, the insulating structure having at least one conductive via, and the active element and the pixel electrode are electrically connected to each other through the at least one conductive via. In some embodiments of the invention, the pixel electrode is disposed on a side of the reflective layer facing the active element. In some embodiments of the present invention, the active element includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode, wherein the semiconductor layer is insulated from the gate electrode, the source electrode is electrically connected to the semiconductor layer, and the drain electrode is electrically connected to the semiconductor layer and the pixel electrode. In some embodiments of the present invention, the active element includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, the semiconductor layer and the gate electrode are insulated from each other, the semiconductor layer is electrically connected to the source electrode and the drain electrode, wherein the drain electrode is electrically connected to the pixel electrode, and the drain electrode and the reflective layer are located on the same layer. In some embodiments of the invention, the conductor layer comprises Indium Gallium Zinc Oxide (IGZO) or Low Temperature Polysilicon (LTPS). In some embodiments of the present invention, the active device includes a metal layer and an amorphous silicon (a-Si) semiconductor which are overlapped and insulated from each other, the metal layer includes a gate electrode and the reflective layer which are insulated from each other, the gate electrode and the amorphous silicon semiconductor are overlapped in a projection range of the substrate, and source electrodes and drain electrodes are disposed on opposite sides of the amorphous silicon semiconductor, the source electrodes and the drain electrodes are respectively electrically connected to the amorphous silicon semiconductor, and the drain electrodes are electrically connected to the pixel electrodes. In some embodiments of the present invention, the reflective layer is disposed on a side of the substrate away from the active device, the substrate has a through hole, the through hole is in communication with the at least one conductive via, and the active device and the pixel electrode are electrically connected to each other through the at least one conductive via and the through hole. In some embodiments of the present invention, the active device includes a semiconductor layer and a gate, wherein source and drain electrodes are disposed on two opposite sides of the semiconductor layer, the source and drain electrodes are respectively electrically connected to the semiconductor layer, and the gate and the semiconductor layer are within a projection ran