CN-121995690-A - Mask, overlay error measurement method and device and overlay equipment

CN121995690ACN 121995690 ACN121995690 ACN 121995690ACN-121995690-A

Abstract

The mask comprises a mask body, and a plurality of overlay marks arranged on the mask body, wherein each overlay mark comprises a plurality of overlay sub-marks, and each of the plurality of overlay sub-marks comprises an overlay sub-mark with the same central point on the same straight line, an overlay sub-mark with the same central point and an overlay sub-mark arranged on different directions. The mask, the overlay error measuring method, the overlay error measuring device and the overlay equipment improve the diversity and the complexity of the overlay mark of the mask, and further improve the accuracy of the overlay process based on the mask.

Inventors

SUN MINGCONG
XING ZEGUANG
Zhuang Boqing
SU XIAOXI

Assignees

成都新紫光半导体科技有限公司

Dates

Publication Date: 20260508
Application Date: 20241104

Claims (11)

1. A mask plate, which comprises a mask plate, characterized by comprising the following steps: A mask body; The mask plate comprises a mask plate body and is characterized by comprising a plurality of mask plate marks, wherein each mask plate body is provided with a plurality of overlay marks, each overlay mark comprises a plurality of overlay sub marks, each of which comprises an overlay sub mark with the same central point on the same straight line, an overlay sub mark with the same central point and an overlay sub mark arranged on different directions.
2. The reticle of claim 1, wherein a distance between each adjacent overlay mark is less than or equal to a preset distance, the distance between each adjacent overlay mark comprising distances in different directions.
3. The reticle of claim 1, wherein the dimensions of each overlay mark are determined according to a resolution of a wafer exposure machine used to perform wafer exposure operations based on the reticle and/or according to a dimension manufacturing threshold of the reticle.
4. A mask plate according to any one of claims 1 to 3, wherein the plurality of overlay marks include overlay marks arranged in different directions, and the number of the overlay marks arranged in different directions is an even number.
5. The reticle of claim 1, wherein the plurality of overlay sub-marks comprises a first mark, a second mark, a third mark, and a fourth mark, a center point of the first mark is the same as a center point of the second mark, a center point of the third mark, and a center point of the fourth mark are on the same line, and the third mark and the fourth mark are disposed in mutually perpendicular directions.
6. The reticle of claim 5, wherein the first marks are in the shape of a Chinese character 'hui', the second marks are in the shape of a cross, and the number of the first marks is greater than the number of the second marks.
7. The mask according to claim 5 or 6, wherein the number of the third marks is plural, the shape of each third mark is the same, each third mark is arranged in parallel in the arrangement direction of the fourth mark, the distance between each adjacent third mark in the arrangement direction of the fourth mark is the same, the dimensional difference between each adjacent third mark is the same, and/or, The number of the fourth marks is one, the shape of the fourth marks is the same as that of the third marks, and the size of the fourth marks is larger than that of the third marks.
8. An overlay error measurement method, comprising: Forming a first graph layer and a plurality of overlay marks corresponding to the first mask plate on a wafer through the first mask plate, wherein the first mask plate adopts the mask plate according to any one of claims 1-7; and performing overlay error measurement at least according to the plurality of overlay marks corresponding to the first mask.
9. The overlay error measurement method of claim 8, the overlay error measurement method is characterized by further comprising the following steps: Comparing the plurality of overlay marks on the second mask plate with the plurality of overlay marks corresponding to the first mask plate to obtain alignment reference information, wherein the alignment reference information is used for representing the position relation between the plurality of overlay marks on the second mask plate and the plurality of overlay marks corresponding to the first mask plate, and the second mask plate adopts the mask plate according to any one of claims 1-7; And forming a second graph layer and a plurality of overlay marks corresponding to the second mask plate on the wafer through the second mask plate according to the alignment reference information.
10. An overlay error measurement apparatus, comprising: a forming module, configured to form a first graphic layer and a plurality of overlay marks corresponding to a first mask on a wafer through the first mask, where the first mask is a mask according to any one of claims 1 to 7; And the measurement module is configured to measure overlay errors at least according to the plurality of overlay marks corresponding to the first mask.
11. An overlay apparatus, comprising: A memory having a computer program stored thereon; A processor for executing the computer program in the memory to implement the overlay error measurement method of claim 8 or 9.

Description

Mask, overlay error measurement method and device and overlay equipment Technical Field The disclosure relates to the technical field of semiconductor manufacturing, in particular to a mask, an overlay error measurement method, an overlay error measurement device and an overlay device. Background In the manufacturing scene of a semiconductor, an overlay process is involved, and the overlay process involves the application of a mask. In the overlay process, multiple reticle patterns need to be exposed on the wafer, which need to be accurately nested together. On the mask, an overlay mark is usually configured, and the overlay mark can be used for improving the precision of the overlay process. Disclosure of Invention The disclosure aims to provide a mask, an overlay error measurement method, an overlay error measurement device and an overlay device, which improve the diversity and complexity of overlay marks of the mask and further improve the precision of an overlay process based on the mask. In order to achieve the above object, according to a first aspect, the present disclosure provides a mask, including a mask body, and a plurality of overlay marks disposed on the mask body, wherein each of the overlay marks includes a plurality of overlay sub-marks, and the plurality of overlay sub-marks includes an overlay sub-mark having a center point on a same straight line, an overlay sub-mark having a same center point, and an overlay sub-mark disposed in different directions. Optionally, the distance between each adjacent overlay mark is less than or equal to a preset distance, and the distance between each adjacent overlay mark includes distances in different directions. Optionally, the size of each overlay mark is determined according to the resolution of a wafer exposure machine and/or determined according to a size manufacturing threshold of the mask, and the wafer exposure machine is used for performing wafer exposure operation based on the mask. Optionally, the plurality of overlay marks include overlay marks disposed in different directions, and the number of the overlay marks disposed in different directions is an even number. Optionally, the plurality of overlay sub-marks comprise a first mark, a second mark, a third mark and a fourth mark, wherein the center point of the first mark is the same as the center point of the second mark, the center points of the second mark, the third mark and the fourth mark are positioned on the same straight line, and the third mark and the fourth mark are arranged in mutually perpendicular directions. Optionally, the first marks are zigzag marks, the second marks are cross marks, and the number of the first marks is larger than that of the second marks. Optionally, the number of the third marks is a plurality, the shapes of the third marks are the same, the third marks are arranged in parallel in the arrangement direction of the fourth marks, the distances between adjacent third marks in the arrangement direction of the fourth marks are the same, the size difference between the adjacent third marks is the same, and/or the number of the fourth marks is one, the shape of the fourth marks is the same as the shape of the third marks, and the size of the fourth marks is larger than the size of the third marks. In a second aspect, the disclosure provides an overlay error measurement method, which includes forming a first pattern layer and a plurality of overlay marks corresponding to a first mask on a wafer through the first mask, wherein the first mask is the mask according to the first aspect, and performing overlay error measurement at least according to the plurality of overlay marks corresponding to the first mask. Optionally, the overlay error measurement method further comprises the steps of comparing a plurality of overlay marks on a second mask plate with a plurality of overlay marks corresponding to the first mask plate to obtain alignment reference information, wherein the alignment reference information is used for representing the position relation between the plurality of overlay marks on the second mask plate and the plurality of overlay marks corresponding to the first mask plate, the second mask plate adopts the mask plate according to the first aspect, and a second graph layer and a plurality of overlay marks corresponding to the second mask plate are formed on the wafer through the second mask plate according to the alignment reference information. In a third aspect, the disclosure provides an overlay error measurement apparatus, including a forming module configured to form a first pattern layer and a plurality of overlay marks corresponding to the first mask on a wafer through the first mask, where the first mask is the mask according to the first aspect, and a measurement module configured to measure an overlay error at least according to the plurality of overlay marks corresponding to the first mask. In a fourth aspect, the present disclosure provides a