CN-121996012-A - Distributed low dropout linear voltage regulator based on digital-analog mixing

CN121996012ACN 121996012 ACN121996012 ACN 121996012ACN-121996012-A

Abstract

The invention relates to the technical field of integrated circuit power management, in particular to a distributed low dropout linear voltage regulator based on digital-analog mixing, which comprises four digital-analog mixing low dropout linear voltage regulator units and an event driven type oscillator, wherein each local digital-analog mixing low dropout linear voltage regulator unit is used for detecting the voltage state of a voltage sensing point, the 4 voltage sensing points are connected through a resistor to form a ring structure, and the event driven type oscillator is used for generating square waves required by work for each local digital-analog mixing low dropout linear voltage regulator unit. Compared with the traditional LDO, the circuit structure of the invention has low IR voltage drop and quick response capability under heavy load, and each detection point jump information is transmitted into the adjacent LDO comparator through the comparator, so that the cooperative work potential is maximized, and the dynamic load regulation capability is remarkably improved.

Inventors

YU QI
CHEN HAIYANG
YU YIHU
NING NING
CHEN YUHONG

Assignees

重庆邮电大学
电子科技大学重庆微电子产业技术研究院

Dates

Publication Date: 20260508
Application Date: 20260203

Claims (10)

1. The distributed low dropout linear voltage regulator based on digital-analog mixing is characterized by comprising four digital-analog mixing low dropout linear voltage regulator units and an event driven oscillator, wherein each local digital-analog mixing low dropout linear voltage regulator unit is used for detecting the voltage state of one voltage sensing point, the 4 voltage sensing points are connected through a resistor to form an annular structure, and the event driven oscillator is used for generating square waves required by working for each local digital-analog mixing low dropout linear voltage regulator unit.
2. The distributed low dropout linear regulator based on digital to analog mixing of claim 1, wherein the local digital to analog hybrid low dropout linear regulator unit comprises a digital logic module, a comparator module with offset, an error amplifier module, a power transistor array, wherein: The digital logic module comprises a state machine and a displacement register, wherein the state machine is used for carrying out loop switching and step length adjustment of the displacement register according to the state of a local voltage sensing point and the states of two adjacent voltage sensing points, and the displacement register is used for registering control signals of each power tube in the power tube array; The comparator module with offset comprises two comparators, and is used for obtaining a local voltage state according to the detection value of a local voltage sensing point as input, and taking the local voltage state as the input of a digital logic module in the local and adjacent digital-analog hybrid low-dropout linear voltage regulator unit; The error amplifier module is used for accessing an analog loop when the voltage sensing point is stable, and the output stability is maintained by controlling the grid voltage of the power tube; and the power tube array is used for providing stable current for the load.
3. The distributed low dropout linear regulator based on digital-analog mixing according to claim 2, wherein each power tube in the power tube array is connected with an output end of the digital logic module through an inverter, wherein an output end of the inverter is connected with a grid electrode of the power tube, an input end of the inverter is connected with an output end of the digital logic module, a source electrode of the power tube is connected with a power supply end, and a drain electrode of the power tube is used as an output of the local digital-analog mixed low dropout linear regulator unit and is connected with a voltage sensing point.
4. The distributed low dropout linear regulator based on digital-analog mixing according to claim 2, wherein the error amplifier module selects an error amplifier with common mode feedback, the positive phase input terminal of the error amplifier is connected with a reference voltage, and the negative phase input terminal of the error amplifier module is connected with the output terminal of the local digital-analog mixing low dropout linear regulator unit.
5. A distributed low dropout linear regulator according to claim 3, wherein the state machine comprises three states, a digital operation mode, a conversion mode, and a steady state mode, wherein: If the local digital-analog mixed low-dropout linear voltage regulator unit and two adjacent digital-analog mixed low-dropout linear voltage regulator units detect that the voltage of the corresponding voltage sensing point deviates from the designated range, the digital working mode is adopted, and the shift register shifts and registers the state of the local voltage sensing point at a set larger step length; If only the local digital-analog hybrid low-dropout linear voltage regulator unit detects that the voltage of the corresponding voltage sensing point deviates from the specified range, a conversion mode is entered, and the shift register shifts and registers the state of the local voltage sensing point with a set smaller step length; The local digital-analog mixed low-dropout linear voltage regulator unit and the two adjacent digital-analog mixed low-dropout linear voltage regulator units are in a steady state mode when the voltage of the corresponding voltage sensing point is not detected to deviate from a specified range.
6. The distributed low dropout linear regulator based on digital-analog mixing according to claim 5, wherein in a digital working mode, the digital logic module defaults to output 128-bit high levels to serve as control signals of 128 power tubes in the power tube array respectively, the first control signals are defaulted to be low levels, when the first control signals are high levels, a power end of the inverter is connected with a power supply end, a grounding end of the inverter is connected with a grounding end, the digital logic module defaults to output 128-bit high levels to turn on after the inverter is turned on after being turned on.
7. The distributed low dropout linear regulator based on digital-analog mixing according to claim 5, wherein in the conversion mode, the digital logic module tracks the state of each power tube in the power tube array, and exclusive-ors the outputs of two adjacent power tubes, if the exclusive-or value of the ith bit and the (i+1) th bit is 0, the (i-12 to i+11) th bit data is set to be low, the other positions are high, 128-bit control signals are output, the (i-12 to i+11) th bit data of the first control signal is set to be high, the other positions are low, the second control signal is set to be low, when the first control signal is set to be low, the power supply end of the inverter is connected with the power supply end, the ground end of the inverter is connected with the ground end, when the first control signal is set to be high, the inverter outputs a loop signal selected by the second control signal, and when the second control signal is set to be low, half of the power supply voltage is set as the loop signal.
8. The distributed low dropout linear regulator based on digital-analog mixing according to claim 5, wherein in a steady state mode, each bit of the first control signal output by the digital logic module is at a high level, the inverter outputs a loop signal selected by the second control signal, the second control signal output by the digital logic module is at a high level, and the signal output by the error amplifier module is output as the loop signal.
9. The distributed low dropout linear regulator according to claim 2, wherein each of the comparators with offset includes a current source, first to sixth N-type MOS transistors, first to sixth P-type MOS transistors, wherein: The sources of all the P-type MOS tubes are connected with the current inflow end of a current source, and the current outflow end of the current source is connected with the drain electrode of the first N-type MOS tube; the first N-type MOS tube grid electrode is connected with the third N-type MOS tube grid electrode, and the first N-type MOS tube source electrode, the second N-type MOS tube source electrode, the third N-type MOS tube source electrode and the fourth N-type MOS tube source electrode are all connected with the grounding end; The grid electrode and the drain electrode of the second N-type MOS tube are connected with the grid electrode of the fourth second N-type MOS tube and the drain electrode of the first P-type MOS tube; the drain electrode of the third N-type MOS tube is connected with the source electrode of the fifth N-type MOS tube and the source electrode of the sixth N-type MOS tube; the drain electrode of the fourth N-type MOS tube is connected with the sixth P-type MOS tube MP6 and is used as the output end of the comparator; The fifth N-type MOS tube grid is used as a negative phase input end of the comparator, and the drain electrode of the fifth N-type MOS tube is connected with the first P-type MOS tube grid, the second P-type MOS tube grid, the drain electrode, the third P-type MOS tube grid and the fourth P-type MOS tube drain electrode; the sixth N-type MOS tube grid is used as the positive input end of the comparator, and the sixth N-type MOS tube drain is connected with the third P-type MOS tube drain, the fourth P-type MOS tube grid, the fifth P-type MOS tube MP5 grid, the drain and the sixth P-type MOS tube MP6 grid.
10. The distributed low dropout linear regulator according to claim 1, wherein the circuit of the event-driven oscillator comprises seventh to thirteenth N-type MOS transistors, seventh to twelfth P-type MOS transistors, first to fourth inverters, and an and gate, wherein: The seventh to thirteenth N-type MOS tube grid electrode and the seventh N-type MOS tube drain electrode are connected with the bias voltage end, and the seventh to thirteenth N-type MOS tube source electrode is connected with the grounding end; The eighth N-type MOS tube drain electrode is connected with the seventh P-type MOS tube drain electrode; The drain electrode of the ninth N-type MOS tube is connected with the grounding end of the first inverter; the drain electrode of the tenth N-type MOS tube is connected with the grounding end of the second inverter; the drain electrode of the eleventh N-type MOS tube is connected with the grounding end of the third inverter; the twelfth N-type MOS transistor drain electrode is connected with the grounding end of the first inverter; the thirteenth N-type MOS tube drain electrode is connected with the grounding end of the AND gate; the grid electrodes of the seventh P type MOS tube to the twelfth P type MOS tube are connected together, and the source electrodes of the seventh P type MOS tube to the twelfth P type MOS tube are connected with the internal power supply end of the oscillator; the drain electrode of the eighth P-type MOS tube is connected with the power end of the first inverter; the drain electrode of the ninth P-type MOS tube is connected with the power end of the second inverter; The tenth P-type MOS tube drain electrode is connected with the power end of the third inverter; The drain electrode of the eleventh P-type MOS tube is connected with the power end of the fourth inverter; the twelfth N-type MOS tube drain electrode is connected with the AND gate power supply end; the output end of the AND gate is connected with the input end of the first inverter and outputs a first low-dropout linear voltage stabilizing signal; The output end of the first inverter is connected with the input end of the second inverter, and outputs a second low-dropout linear voltage stabilizing signal; the output end of the second inverter is connected with the input end of the third inverter, and outputs a third low-dropout linear voltage stabilizing signal; The output end of the third inverter is connected with the input end of the fourth inverter, and outputs a fourth low-dropout linear voltage stabilizing signal; The output of the fourth inverter is used as one of the inputs of the AND gate, and the second control signal of the digital logic module is used as the other input of the AND gate.

Description

Distributed low dropout linear voltage regulator based on digital-analog mixing Technical Field The invention relates to the technical field of integrated circuit power management, and can be applied to scenes with high requirements on power supply precision and stability, such as high-performance computing, internet of things, intelligent terminals and the like, in particular to a distributed low-dropout linear voltage regulator based on digital-analog mixing. Background With the rapid development of modern electronics, heterogeneous, high performance systems continue to evolve toward higher performance, lower power consumption, and more complex functional integration. Under such a background, a distributed low-voltage linear regulator (LDO) power supply network is rapidly developed as a key power management technology, and the purpose of the distributed low-voltage linear regulator (LDO) power supply network is to solve many challenges faced by a traditional centralized power supply architecture when facing a large-scale and high-dynamic load, such as excessive voltage drop (IR drop), slow dynamic response speed, and insufficient load regulation precision. Distributed LDOs break down a single LDO into multiple small LDO instances (or replicate multiple small capacity LDOs), and are deployed spatially distributed on the grid. The design can increase the number of voltage sensing points and greatly shorten the Vdrop detection delay. For example, as shown in fig. 1, after a single LDO is split into two small LDOs, each LDO can directly sense the local voltage state and simultaneously provide current to the load nearby, so that the two core problems can be solved more efficiently. The problems are generally solved in two ways in the prior art, firstly, independent mixed LDOs are adopted, but the independent mixed LDOs have obvious current sharing unbalance problem, so that the power supply stability and the long-term reliability of devices are affected, and in the independent mixed LDOs, the digital loop and the power tube of the analog loop are independent of each other and are not reused, so that the whole area occupation of the power tube is overlarge, and the layout difficulty and the manufacturing of chips are obviously increased. Secondly, a distributed LDO is adopted, but the local LDO cannot quickly share jump information of a local sensing point of the adjacent LDO, so that transient performance of the LDO is affected, in addition, space distributed layout does not maximally utilize adjacent LDO to perform cooperative work, an oscillator of the distributed LDO is always in a working state, and when a circuit is stable, power consumption of the oscillator is invalid. Disclosure of Invention Aiming at the problems existing in the prior art, the invention provides a distributed low dropout linear voltage regulator based on digital-analog mixing, which comprises four digital-analog mixing low dropout linear voltage regulator units and an event driven type oscillator, wherein each local digital-analog mixing low dropout linear voltage regulator unit is used for detecting the voltage state of one voltage sensing point, the 4 voltage sensing points are connected through a resistor to form a ring structure, and the event driven type oscillator is used for generating square waves required by the work of each local digital-analog mixing low dropout linear voltage regulator unit. Further, the local digital-analog hybrid low dropout linear voltage regulator unit comprises a digital logic module, a comparator module with offset, an error amplifier module and a power tube array, wherein: The digital logic module comprises a state machine and a displacement register, wherein the state machine is used for carrying out loop switching and step length adjustment of the displacement register according to the state of a local voltage sensing point and the states of two adjacent voltage sensing points, and the displacement register is used for registering control signals of each power tube in the power tube array; The comparator module with offset comprises two comparators, and is used for obtaining a local voltage state according to the detection value of a local voltage sensing point as input, and taking the local voltage state as the input of a digital logic module in the local and adjacent digital-analog hybrid low-dropout linear voltage regulator unit; the error amplifier module is used for being connected into an analog loop when the voltage sensing point is stable, the output stability is maintained by controlling the grid voltage of the power tube, and a cascade capacitor and a cascade resistor are connected between the negative phase input end and the output end of the error amplifier module for miller compensation; and the power tube array is used for providing stable current for the load. Further, each power tube in the power tube array is connected with the output end of the digital logic module through an inv