CN-121996015-A - Low-voltage linear voltage stabilizing circuit of wide loop broadband and high-frequency PSRR

CN121996015ACN 121996015 ACN121996015 ACN 121996015ACN-121996015-A

Abstract

The invention relates to the technical field of integrated circuit design, in particular to a low-voltage linear voltage stabilizing circuit of a wide loop broadband and high-frequency PSRR, which comprises an error amplifier, two modules with frequency compensation FVF structures and a resistor array, wherein the modules with the first frequency compensation FVF structure receive a specific value output by the error amplifier and output feedback voltage for improving the transient response speed of the circuit, and the modules with the second frequency compensation FVF structure receive the specific value output by the error amplifier and output working voltage to a load for improving the load bearing capacity of the circuit. The invention adopts LDO design of a frequency feedback voltage FVF structure, and aims to improve the performance of the high-frequency PSRR module by expanding loop bandwidth and enhancing the high-frequency PSRR module. The FVF structure is adopted to remarkably enhance the load bearing capacity of the LDO, and the high-frequency PSRR lifting circuit is introduced to endow the LDO with strong anti-interference performance in a specific frequency range.

Inventors

YIN HAIYANG
LAI GUANGSHENG
FENG YUAN
LI LEI

Assignees

成都芯卓微电子科技有限公司

Dates

Publication Date: 20260508
Application Date: 20260209

Claims (7)

1. The low-voltage linear voltage stabilizing circuit of the wide loop broadband and high-frequency PSRR is characterized by comprising an error amplifier, two modules provided with a frequency compensation FVF structure and a resistor array; the error amplifier inputs a reference voltage and a feedback voltage, outputs a specific value and is used for keeping the specific value stable; the module provided with the frequency compensation FVF structure comprises a first frequency compensation FVF structure module and a second frequency compensation FVF structure module, wherein the first frequency compensation FVF structure module and the second frequency compensation FVF structure module are connected between a power supply and the ground in parallel; the module of the first frequency compensation FVF structure receives a specific value output by the error amplifier, and outputs feedback voltage for improving the transient response speed of the circuit; The module of the second frequency compensation FVF structure receives a specific value output by the error amplifier, outputs working voltage to a load and is used for improving the load bearing capacity of the circuit; the resistor array is connected to the output of the module of the first frequency compensated FVF structure and the error amplifier feedback voltage input for enabling accurate regulation of the output voltage.
2. The low-voltage linear voltage stabilizing circuit of the wide loop broadband and high-frequency PSRR of claim 1, wherein the module of the first frequency compensation FVF structure comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a resistor R1; The source electrode of the first MOS tube is connected with a power supply, the drain electrode of the first MOS tube is connected with the source electrode of the second MOS tube, and the drain electrode of the second MOS tube is grounded through a resistor R1; The grid electrodes of the third MOS tube and the fourth MOS tube are respectively input with bias voltages, the drain electrode of the third MOS tube is connected with the grid electrode of the first MOS tube, the source electrode of the third MOS tube is connected with the drain electrode of the fourth MOS tube, and the source electrode of the fourth MOS tube is connected with the drain electrode of the second MOS tube.
3. The low-voltage linear voltage stabilizing circuit of the wide loop broadband and high-frequency PSRR of claim 1, wherein the structure of the module of the second frequency compensation FVF structure comprises a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube and a resistor R2; The source electrode of the fifth MOS tube is connected with a power supply, the drain electrode of the fifth MOS tube is connected with the source electrode of the sixth MOS tube, and the drain electrode of the sixth MOS tube is grounded through a resistor R2; Bias voltages are respectively input to the grid electrodes of the seventh MOS tube and the eighth MOS tube, the drain electrode of the seventh MOS tube is connected with the grid electrode of the sixth MOS tube, the source electrode of the seventh MOS tube is connected with the drain electrode of the eighth MOS tube, and the source electrode of the eighth MOS tube is connected with the drain electrode of the sixth MOS tube.
4. The low voltage linear voltage regulator circuit of a wide loop broadband and high frequency PSRR of claim 1, wherein said error amplifier employs a folded cascode amplifier comprising an input stage and an output stage; the input stage includes transistors NM1, NM2, NM3; The output stage comprises transistors PM1, PM2, PM3, PM4, NM5, NM6, NM7; The source electrode of the transistor PM1 is connected with a power supply, the drain electrode of the transistor PM1 is connected with the source electrode of the transistor PM3, the drain electrode of the transistor PM3 is connected with the drain electrode of the NM4, the source electrode of the NM4 is connected with the drain electrode of the NM6, and the source electrode of the NM6 is connected with the ground; The source electrode of the transistor PM2 is connected with a power supply, the drain electrode of the transistor PM2 is connected with the source electrode of the transistor PM4, the drain electrode of the transistor PM4 is connected with the drain electrode of the NM5, the source electrode of the NM5 is connected with the drain electrode of the NM7, and the source electrode of the NM7 is connected with the ground; The gate of the transistor PM1 is connected with the gate of the transistor PM2, the gate of the transistor PM3 is connected with the gate of the transistor PM4, the gate of the transistor NM4 is connected with the gate of the transistor NM5, the gate of the transistor NM6 is connected with the gate of the transistor NM 7; the drain of the transistor NM4 is connected to the gate of the transistor NM 6; the drain of the transistor PM1 and the drain of the transistor PM2 are also connected to the drains of the transistors NM1 and NM2 in the input stage, respectively; the sources of the transistors NM1 and NM2 are connected with the drain of the transistor NM3, and the source of the transistor NM3 is grounded; The gate of the transistor NM1 inputs a reference voltage, and the gate of the transistor NM2 inputs a feedback voltage.
5. A low voltage linear voltage regulator circuit of a wide loop broadband and high frequency PSRR as set forth in any of claims 1-4, wherein a capacitor is connected between the output and input of said error amplifier to form a miller compensation circuit.
6. A control method of a low-voltage linear voltage stabilizing circuit of a wide-loop broadband and high-frequency PSRR, characterized in that a low-voltage linear voltage stabilizing circuit of a wide-loop broadband and high-frequency PSRR is constructed as set forth in any one of claims 1 to 5, and the circuit is stabilized by series connection of zero elimination resistors in the circuit.
7. The method for controlling a low voltage linear voltage stabilizing circuit of a wide loop broadband and high frequency PSRR as set forth in claim 6, wherein the zero elimination resistor has a calculation formula: ; Wherein Z1 is zero elimination resistor, cc is Miller capacitance, and gm3 is equivalent transconductance of the second pole of the LDO topology.

Description

Low-voltage linear voltage stabilizing circuit of wide loop broadband and high-frequency PSRR Technical Field The technical field of integrated circuit design, in particular to a low-voltage linear voltage stabilizing circuit of a wide loop broadband and high-frequency PSRR. Background Low dropout linear voltage regulator (LDO) is widely used in various electronic devices as a core component of a power management unit due to its advantages of simple structure, low cost, low noise, low quiescent current, etc. With the rapid development of portable devices, internet of things nodes and system-on-a-chip (SoC), higher integration, smaller solution volumes and better dynamic performance requirements are being put forward for LDOs. In order to reduce the number of external components, reduce the cost of the system and the occupied area of the board, a "Cap-Free" LDO has been developed and is a current research hotspot. Conventional LDOs typically rely on an external ceramic capacitor at the output of a large value (typically on the order of 1 μf to 10 μf) to compensate for loop stability and to suppress output voltage fluctuations due to load transients. However, the existence of the external capacitor is contrary to the development trend of high integration and small volume. Therefore, there are a variety of LDO architectures without external capacitor in the prior art. These architectures typically achieve loop stabilization over the full load range by employing on-chip compensation techniques such as nested miller compensation, voltage buffer compensation, or feedback feedforward-based pole-zero tracking techniques. While the prior art has successfully achieved "no external capacitance" for LDOs, such LDOs often have the following inherent limitations associated with each other while pursuing high integration: the contradiction between the load capacity and the dynamic performance is that the parasitic capacitance of the large-size power tube designed for realizing large load current can severely limit the loop bandwidth, so that the transient response speed of the load is slow and the fluctuation of the output voltage is large. The contradiction between bandwidth and stability, namely, the conservative compensation strategy adopted for ensuring the stability without external capacitor sacrifices the system bandwidth and restricts the improvement of dynamic performance. The inherent defect of high-frequency PSRR performance is that the high-frequency PSRR performance of the high-frequency PSRR above hundreds of kHz is seriously deteriorated due to the lack of a high-frequency bypass of an external capacitor and the direct feedforward effect of a parasitic capacitor of a power tube, and the power supply requirement of a high-precision analog/radio-frequency circuit sensitive to power supply noise cannot be met. Therefore, there is a strong need in the art for an innovative LDO circuit architecture that can simultaneously break through the above limitations without any external output capacitor, and achieve the triple objectives of strong load driving capability, high loop bandwidth (fast transient response), and excellent high-frequency PSRR performance. This is the technical problem to be solved by the present invention. Disclosure of Invention The invention aims to solve the problem of limitation of the traditional low dropout linear voltage regulator (LDO) without external capacitor in the aspects of load bearing capacity, bandwidth and high-frequency Power Supply Rejection Ratio (PSRR), adopts the LDO design of a frequency Feedback Voltage (FVF) structure, and provides a low-voltage linear voltage stabilizing circuit with wide loop bandwidth and high-frequency PSRR, which aims to improve the performance of the low-voltage linear voltage stabilizing circuit by expanding the loop bandwidth and enhancing a high-frequency PSRR module. In order to achieve the above object, the present invention provides the following technical solutions: a low-voltage linear voltage stabilizing circuit of wide loop broadband and high-frequency PSRR comprises an error amplifier, two modules provided with a frequency compensation FVF structure and a resistor array; the error amplifier inputs a reference voltage and a feedback voltage, outputs a specific value and is used for keeping the specific value stable; the module provided with the frequency compensation FVF structure comprises a first frequency compensation FVF structure module and a second frequency compensation FVF structure module, wherein the first frequency compensation FVF structure module and the second frequency compensation FVF structure module are connected between a power supply and the ground in parallel; the module of the first frequency compensation FVF structure receives a specific value output by the error amplifier, and outputs feedback voltage for improving the transient response speed of the circuit; The module of the second frequency compensation FVF str