CN-121996016-A - Automatic correct compensation pole zero cancellation circuit and method

CN121996016ACN 121996016 ACN121996016 ACN 121996016ACN-121996016-A

Abstract

The invention discloses a zero cancellation circuit and method for automatic correct compensation, relating to the technical field of radiation measurement equipment, the digital potentiometer and the high-speed comparator are combined, so that automatic compensation of the circuit is realized, complex calculation or complicated replacement process is not needed, and the debugging efficiency is improved. The output result can guide the improvement of the subsequent circuit, such as the simplification of the circuit. And when the output result is enough, the compensation effect of the zero cancellation circuit can be empirically judged according to the output result, so that the detection and maintenance of a part of circuits are convenient. The digital controllable potentiometer has a monitoring effect on waveforms, can select whether compensation and compensation effects are needed according to actual application needs, and has a wide application range.

Inventors

LIU BIAO
WANG WEI
CAO ZHOU
ZOU YUTAO

Assignees

中国兵器装备集团自动化研究所有限公司

Dates

Publication Date: 20260508
Application Date: 20260115

Claims (10)

1. An auto-correct compensation pole zero cancellation circuit comprising: the digital potentiometer is connected in a feedback loop of the zero cancellation network and is used for adjusting the resistance in the feedback loop; The control chip is connected with the digital potentiometer and is used for controlling the resistance value of the digital potentiometer; The polarity judging module comprises a first digital-to-analog converter and a first high-speed comparator and is used for identifying the polarity of an input signal; The compensation judging module comprises a second digital-to-analog converter, a high-voltage slew rate operational amplifier and a second high-speed comparator, and is used for judging a compensation state; The control chip sets the polarity of the output voltage of the second digital-to-analog converter according to the output of the polarity judging module, and dynamically adjusts the resistance value of the digital potentiometer according to the output of the compensation judging module, so that the circuit automatically compensates along with signal fluctuation until optimal compensation is achieved.
2. The auto-correct compensation pole zero cancellation circuit according to claim 1, wherein the digital potentiometer is a non-volatile digital potentiometer.
3. The auto-correct compensation pole zero cancellation circuit according to claim 1, wherein the control chip is any one of a microcontroller, an FPGA, and a CPLD.
4. A method of auto-correctly compensating for a zero cancellation circuit according to any one of claims 1 to 3, the method comprising: s1, the control chip controls the first digital-to-analog converter to sequentially output positive and negative reference voltages to a comparison end of the first high-speed comparator, and signal polarity is determined according to a comparison result; s2, controlling the second digital-to-analog converter to output opposite voltage polarity by the control chip according to the signal polarity; S3, the control chip controls the initial resistance of the output resistor of the digital potentiometer; S4, amplifying the waveform with zero cancellation by the high-voltage slew rate operational amplifier, inputting the waveform to one input end of the second high-speed comparator, and connecting the output of the second digital-to-analog converter to the other input end of the second high-speed comparator as a compensation reference; s5, carrying out compensation state judgment according to the condition of the high-low level output by the second high-speed comparator to obtain a compensation result; And S6, according to the corresponding relation between the judging result and the initial resistance value of the resistor, the control chip adjusts the resistance value of the digital potentiometer, adjusts the resistance value of the digital potentiometer in a stepping approximation mode, adjusts the resistance value of the digital potentiometer from an overcompensation state to an undercompensation state until overcompensation signals disappear, and repeats S4-S6 until the second high-speed comparator outputs a state indicating compensation to correctly realize optimal compensation.
5. The method of claim 4, wherein if the signal polarity is positive, the second dac outputs a negative voltage and vice versa.
6. The method of claim 4, wherein the second high-speed comparator determines overcompensation if it outputs a low level or no pulse output, and determines undercompensation if it outputs a low level or no pulse output.
7. The method of automatically compensating for zero cancellation of an electrical resistor of claim 4, wherein the initial resistance of the electrical resistor is set within an adjustable range thereof.
8. The method of automatically compensating for zero cancellation of a digital potentiometer according to claim 7, wherein the initial resistance is any value between 1/4 and 3/4 of the total resistance of the digital potentiometer.
9. The method of claim 4, wherein the adjusting from the overcompensated state to the undercompensated state includes adjusting in a direction of decreasing the resistance if overcompensated and adjusting in a direction of increasing the resistance if undercompensated.
10. The auto-correct compensation pole zero cancellation method according to claim 4, further comprising storing the final optimized resistance value and invoking it when the system is restarted.

Description

Automatic correct compensation pole zero cancellation circuit and method Technical Field The invention relates to the technical field of radiation measurement equipment, in particular to an automatic correct compensation zero cancellation circuit and method. Background Polar zero cancellation (Pole-Zero Cancellation) is an important concept in control theory and electronics, meaning that the system performance is optimized by adjusting the positions of poles and zeros in the transfer function of the system to cancel each other out. ‌ A The core of the extremely zero cancellation is the mathematical treatment of the transfer function of the system. When the numerator (zero) and denominator (pole) of the transfer function are identical, these factors can be reduced, resulting in the corresponding poles and zeros coinciding in the complex plane and canceling each other. ‌ this phenomenon is directly related to the structural characteristics of a linear stationary system, and especially in state space analysis, may cause a lack of controllability or observability of the system. ‌ A Patent document CN202210329362 describes an automatic digital pole zero cancellation method. The patent describes a digital automatic zero setting method which comprises the steps of Step1, sending a default threshold value and zero setting parameters to a lower computer to set and sample a zero line, and Step2, adjusting the zero setting parameters by analyzing the relation between line tailing and a base line until the minimum number of the parameters is adjusted. According to the above-mentioned zero-pole cancellation method, a proper zero-pole parameter can be obtained, but its system composition is composed of upper computer software and digital pulse amplitude analyzer, so that it is relatively large and complex, and the digital pulse amplitude analyzer belongs to precise instrument, and its cost requirement is high, if it is failed, the cost burden is too large and the maintenance of complex system is very troublesome. Disclosure of Invention In view of the above, the present invention provides an auto-correct compensation zero cancellation circuit and method for overcoming or at least partially solving the above problems. The invention provides the following scheme: An auto-correctly-compensated pole-zero cancellation circuit comprising: the digital potentiometer is connected in a feedback loop of the zero cancellation network and is used for adjusting the resistance in the feedback loop; The control chip is connected with the digital potentiometer and is used for controlling the resistance value of the digital potentiometer; The polarity judging module comprises a first digital-to-analog converter and a first high-speed comparator and is used for identifying the polarity of an input signal; The compensation judging module comprises a second digital-to-analog converter, a high-voltage slew rate operational amplifier and a second high-speed comparator, and is used for judging a compensation state; The control chip sets the polarity of the output voltage of the second digital-to-analog converter according to the output of the polarity judging module, and dynamically adjusts the resistance value of the digital potentiometer according to the output of the compensation judging module, so that the circuit automatically compensates along with signal fluctuation until optimal compensation is achieved. Preferably, the digital potentiometer is a nonvolatile digital potentiometer. Preferably, the control chip is any one of a microcontroller, an FPGA and a CPLD. An automatic correct compensation pole zero cancellation method applied to the automatic correct compensation pole zero cancellation circuit, comprising: s1, the control chip controls the first digital-to-analog converter to sequentially output positive and negative reference voltages to a comparison end of the first high-speed comparator, and signal polarity is determined according to a comparison result; s2, controlling the second digital-to-analog converter to output opposite voltage polarity by the control chip according to the signal polarity; S3, the control chip controls the initial resistance of the output resistor of the digital potentiometer; S4, amplifying the waveform with zero cancellation by the high-voltage slew rate operational amplifier, inputting the waveform to one input end of the second high-speed comparator, and connecting the output of the second digital-to-analog converter to the other input end of the second high-speed comparator as a compensation reference; s5, carrying out compensation state judgment according to the condition of the high-low level output by the second high-speed comparator to obtain a compensation result; And S6, according to the corresponding relation between the judging result and the initial resistance value of the resistor, the control chip adjusts the resistance value of the digital potentiometer, adjusts the resistance value of t