CN-121996017-A - Automatic power control circuit

CN121996017ACN 121996017 ACN121996017 ACN 121996017ACN-121996017-A

Abstract

The application provides an automatic power control circuit of an optical communication chip, which is coupled with a digital control unit and a direct current-direct current converter. The automatic power control circuit comprises a digital-to-analog converter coupled to the digital control unit, an output buffer circuit coupled to the digital-to-analog converter and the DC-to-DC converter for providing an internal node voltage, and an analog-to-digital converter coupled to the output buffer circuit and the digital control unit, wherein the digital-to-analog converter receives a digital code generated by the digital control unit to generate a digital-to-analog converter output voltage, and the analog-to-digital converter controls a supply voltage output by the DC-to-DC converter through the digital-to-analog converter so that a voltage difference between the supply voltage and the internal node voltage is maintained within a normal working range.

Inventors

CHEN PEIWEI
CHEN XIANGU

Assignees

连恩微电子股份有限公司

Dates

Publication Date: 20260508
Application Date: 20251022
Priority Date: 20241105

Claims (11)

1. An automatic power control circuit of an optical communication chip, coupled to a digital control unit and a dc-dc converter, the automatic power control circuit comprising: The digital-to-analog converter is coupled with the digital control unit and receives a digital code generated by the digital control unit to generate a digital-to-analog converter output voltage; An output buffer circuit coupled to the DAC and the DC-DC converter, the output buffer circuit providing an internal node voltage; The analog-digital converter is coupled to the output buffer circuit and the digital control unit, and controls a supply voltage output by the DC-DC converter through the digital-analog converter so that a voltage difference between the supply voltage and the internal node voltage is maintained within a normal working range.
2. The automatic power control circuit of claim 1 wherein said analog-to-digital converter adjusts said supply voltage such that said supply voltage decreases and approaches said internal node voltage, a lower said voltage differential between said supply voltage and said internal node voltage, a lower a power consumption of said automatic power control circuit.
3. The automatic power control circuit of claim 1, wherein the analog-to-digital converter detects and converts the internal node voltage of the output buffer circuit into a digital signal, and the digital control unit generates the digital code according to the digital signal.
4. The automatic power control circuit of claim 1, wherein the output buffer circuit comprises: The first transistor comprises a first end, a second end, a control end and a first control end, wherein the first end receives the supply voltage output by the DC-DC converter; A first error amplifier including a first end, a second end receiving the DAC output voltage generated by the DAC, and an output end coupled to the control end of the first transistor, and And a voltage dividing circuit for dividing the internal node voltage to obtain a divided voltage, wherein the divided voltage is coupled to the first end of the first error amplifier.
5. The automatic power control circuit of claim 1, wherein the output buffer circuit comprises a plurality of output buffer circuits, the automatic power control circuit further comprising a multiplexer coupled between the ADC and the output buffer circuit, the multiplexer selecting one of a plurality of internal node voltages of the output buffer circuit to be transmitted to the ADC.
6. The automatic power control circuit of claim 1, further comprising a current mirror coupled to the output buffer circuit for mirroring an internal transistor current generated by the output buffer circuit.
7. The automatic power control circuit of claim 6, wherein, The current mirror comprises a second transistor, a third transistor, and a detection resistor, The second transistor comprises a first end coupled to the DC-DC converter to receive the supply voltage, a second end coupled to the third transistor, and a control end coupled to the output buffer circuit; The third transistor comprises a first end, a second end, a detection resistor, an analog-digital converter, a control end and an output buffer circuit, wherein the first end is coupled to the second end of the second transistor; The detection resistor comprises a first end coupled to the third transistor and the analog-to-digital converter, and a second end coupled to a ground end, The analog-digital converter converts a detection voltage of the detection resistor into the digital signal to be sent to the digital control unit.
8. The automatic power control circuit of claim 1, further comprising a current mirror coupled to the output buffer circuit for mirroring an internal transistor current generated by the output buffer circuit, and A second error amplifier coupled to the output buffer circuit and the current mirror for comparing the internal node voltage of the output buffer circuit with a coupling point voltage of the current mirror, wherein, The current mirror comprises a second transistor, a third transistor, and a detection resistor, The second transistor comprises a first end coupled to the DC-DC converter to receive the supply voltage, a second end coupled to the third transistor, and a control end coupled to the output buffer circuit; The third transistor comprises a first end, a second end, a detection resistor, an analog-digital converter, a control end and a first output end, wherein the first end is coupled to the second end of the second transistor; the detection resistor comprises a first end coupled to the third transistor and the ADC, a second end coupled to the ground, and The second error amplifier includes a first terminal coupled to the internal node voltage, a second terminal coupled to a coupling point of the second transistor and the third transistor of the current mirror, and an output terminal coupled to the control terminal of the third transistor, The analog-digital converter converts a detection voltage of the detection resistor into the digital signal to be sent to the digital control unit.
9. The automatic power control circuit of claim 4, wherein the output buffer circuit further comprises a sense resistor coupled between the first transistor and the voltage divider circuit, The detection resistor comprises a first end coupled to the first transistor and a second end coupled to the load, The detection resistor may be selectively coupled to the analog-to-digital converter, When the power consumption of the DAC and the first transistor is controlled, the detection resistor is coupled to the DAC, The analog-digital converter converts a detection current of the detection resistor into a digital signal to be sent to the digital control unit.
10. The automatic power control circuit of claim 9, wherein the load is a silicon photonics circuit.
11. The automatic power control circuit of claim 1, wherein the output buffer circuit comprises: A fourth transistor including a first terminal receiving the supply voltage outputted from the DC-DC converter, a second terminal coupled to a fourth resistor, and a control terminal; a fifth transistor including a first end receiving the supply voltage outputted from the DC-DC converter, a second end coupled to the analog-digital converter, and a control end, wherein the fourth and fifth transistors constitute a current mirror; a first error amplifier including a first end, a second end receiving the DAC output voltage generated by the DAC, an output end coupled to the control ends of the fourth and fifth transistors, and A fourth resistor coupled to the fourth transistor and the first error amplifier for converting a current of the fourth transistor into the internal node voltage.

Description

Automatic power control circuit Technical Field The present application relates to an automatic power control circuit (Automatic Power Circuit), and more particularly, to an automatic power control circuit applied to an optical communication chip. Background The optical communication chip (Optical Communication Chips) plays an important role in modern communication. The following are several exemplary primary uses thereof: And the optical communication chip utilizes optical signals to carry out data transmission, and has higher bandwidth and speed compared with the traditional electric signals. This enables the optical communication chip to transmit large amounts of data in a very short time, suitable for high-speed internet, data center and large-scale computing applications. Low delay and high stability, low delay of optical signal transmission, no influence of electromagnetic interference, and stable and reliable data communication. This is particularly important for applications requiring high precision and real-time, such as financial transactions and telemedicine. The power consumption is reduced, and the energy consumption of the optical communication chip is relatively low because the transmission efficiency of the optical signal is high and the heating value is small. This helps to save energy and reduce operating costs in large facilities such as data centers that require long runs. Long-range communication-optical fiber communication technology allows data transmission over extremely long distances with little signal attenuation. The optical communication chip is widely applied to a trans-continental and trans-national communication network to realize a global network. Telecommunication infrastructure modern telecommunication networks rely heavily on optical fiber communication, with optical communication chips playing a core role in base stations, switches and routers, supporting high-speed internet, 5G networks and other telecommunication services. Data center interconnection-in large data centers, high-speed connections are required between individual servers and storage devices. The optical communication chip provides a high-bandwidth and low-delay connection mode, and improves the operation efficiency of the data center. The optical communication chip is also one of the core components of the quantum communication technology. Quantum communication utilizes quantum state of photon to make transmission so as to implement communication with ultra-high safety. Therefore, how to effectively reduce the energy consumption of the optical communication chip is one of the efforts in the industry. Disclosure of Invention In order to solve the above technical problems, an objective of the present application is to provide an automatic power control circuit applied to an optical communication chip architecture. The aim and the technical problems of the application are realized by adopting the following technical proposal. In one aspect, the present application provides an automatic power control circuit of an optical communication chip, which is coupled to a digital control unit and a dc-dc converter. The automatic power control circuit comprises a digital-to-analog converter coupled to the digital control unit, wherein the digital-to-analog converter receives a digital code generated by the digital control unit to generate a digital-to-analog converter output voltage, an output buffer circuit coupled to the digital-to-analog converter and the DC-to-DC converter, wherein the output buffer circuit provides an internal node voltage, and an analog-to-digital converter coupled to the output buffer circuit and the digital control unit, wherein the analog-to-digital converter controls a supply voltage output by the DC-to-DC converter through the digital-to-analog converter so that a differential pressure between the supply voltage and the internal node voltage is maintained within a normal working range. For a better understanding of the above and other aspects of the application, reference will now be made in detail to the following examples, examples of which are illustrated in the accompanying drawings. Drawings Fig. 1A and 1B are circuit diagrams of an automatic power control circuit according to an embodiment of the application. Fig. 2 is a circuit diagram of an automatic power control circuit according to another embodiment of the application. Fig. 3A is a circuit diagram of an automatic power control circuit according to another embodiment of the application. Fig. 3B is a circuit diagram of an automatic power control circuit according to another embodiment of the application. Fig. 4 is a circuit diagram of an automatic power control circuit according to another embodiment of the application. Fig. 5 is a circuit diagram of an automatic power control circuit according to another embodiment of the application. Detailed Description The foregoing and other features, aspects and advantages of the present appl