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CN-121996025-A - Clock signal processing method and device, electronic equipment and storage medium

CN121996025ACN 121996025 ACN121996025 ACN 121996025ACN-121996025-A

Abstract

The application provides a clock signal processing method, a device, electronic equipment and a storage medium, relates to the technical field of computers, and is used for improving the detection efficiency of clock signals. The method comprises the steps of obtaining a to-be-detected waveform file and target metadata of a to-be-detected clock signal, wherein the to-be-detected waveform file comprises simulation results corresponding to the to-be-detected clock signal in a target time period, analyzing and obtaining a change value sequence of the to-be-detected clock signal from the to-be-detected waveform file according to the target metadata, wherein the change value sequence comprises edge time points of the to-be-detected clock signal in the target time period and logic values corresponding to each edge time point of the to-be-detected clock signal, and analyzing and processing the change value sequence to obtain clock signal information of the to-be-detected clock signal, wherein the clock signal information is used for indicating state change conditions of the to-be-detected clock signal in the target time period.

Inventors

  • Yue Chuanlin
  • QIAO YANBO

Assignees

  • 极睿智芯(上海)技术有限公司

Dates

Publication Date
20260508
Application Date
20260105

Claims (10)

  1. 1. A clock signal processing method, comprising: Obtaining a waveform file to be detected and target metadata of a clock signal to be detected, wherein the waveform file to be detected comprises simulation results corresponding to the clock signal to be detected in a target time period; Analyzing the waveform file to be detected according to the target metadata to obtain a change value sequence of the clock signal to be detected, wherein the change value sequence comprises edge time points of the clock signal to be detected in the target time period and logic values corresponding to the edge time points of the clock signal to be detected; And analyzing and processing the change value sequence to obtain clock signal information of the clock signal to be detected, wherein the clock signal information is used for indicating the state change condition of the clock signal to be detected in the target time period.
  2. 2. The method of claim 1, wherein the waveform file to be detected comprises simulation results of a plurality of clock signals of different signal levels, the plurality of clock signals comprising the clock signal to be detected, the target metadata comprising signal levels and names of the clock signal to be detected; And analyzing the waveform file to be detected according to the target metadata to obtain a change value sequence of the clock signal to be detected, wherein the change value sequence comprises the following steps: analyzing from header information of the waveform file to be detected according to the signal level and the name of the clock signal to be detected to obtain an identifier of the clock signal to be detected, wherein the header information comprises metadata of the clock signals; And according to the identifier, analyzing a plurality of edge time points of the clock signal to be detected and logic values corresponding to each edge time point from the signal value change record of the waveform file to be detected so as to obtain the change value sequence.
  3. 3. The method of claim 2, wherein prior to the obtaining the waveform file to be detected and the target metadata of the clock signal to be detected, the method further comprises: Extracting target head information from head information of an original waveform file according to signal levels and names of the plurality of clock signals, wherein the original waveform file comprises simulation results corresponding to a target chip in a target time period; Extracting a target data segment from the original waveform file according to the target header information, wherein the target data segment comprises signal value change records of the plurality of clock signals in the target time segment; and obtaining the waveform file to be detected according to the target head information and the target data segment.
  4. 4. A method according to any one of claims 1-3, wherein said analyzing said sequence of variation values to obtain clock signal information of said clock signal to be detected comprises: Obtaining a plurality of frequency points corresponding to the clock signal to be detected in the target time period and frequency point starting time corresponding to each frequency point according to the change value sequence and a first preset parameter, wherein the first preset parameter comprises a frequency value used for judging whether the frequency point changes, the frequency point is a frequency value of the clock signal to be detected in at least one period, and the frequency point starting time is an edge time point of the first period in the time period where each frequency point is located; And calculating the duration of each frequency point and the duration duty ratio of each frequency point according to the plurality of frequency points and the frequency point starting time corresponding to each frequency point to obtain the clock signal information.
  5. 5. A method according to any one of claims 1-3, wherein said analyzing said sequence of variation values to obtain clock signal information of said clock signal to be detected comprises: judging whether the clock signal to be detected has burrs or not according to the change value sequence and a second preset parameter, wherein the second preset parameter comprises a burr width threshold value used for judging whether the clock signal to be detected has burrs or not; and under the condition that the clock signal to be detected has burrs, obtaining the burr starting moment and the burr width of the burrs so as to obtain the clock signal information.
  6. 6. A method according to any one of claims 1-3, wherein said obtaining clock signal information of said clock signal to be detected from said sequence of change values comprises: Traversing the change value sequence, and judging whether the clock signal to be detected has closing time in the target time period; and under the condition that the clock signal to be detected has closing time in the target time period, obtaining the closing time of the clock signal to be detected so as to obtain the clock signal information.
  7. 7. A method according to any one of claims 1-3, wherein said obtaining clock signal information of said clock signal to be detected from said sequence of change values comprises: Traversing the change value sequence according to a preset abnormal logic value, and identifying a target abnormal logic value corresponding to the preset abnormal logic value in the change value sequence; and obtaining the target abnormal logic value and an edge time point corresponding to the target abnormal logic value to obtain the clock signal information.
  8. 8. A clock signal processing apparatus, comprising: The device comprises an acquisition module, a detection module and a detection module, wherein the acquisition module is used for acquiring a waveform file to be detected and target metadata of a clock signal to be detected, and the waveform file to be detected comprises a simulation result corresponding to the clock signal to be detected in a target time period; the analysis module is used for analyzing the change value sequence of the clock signal to be detected from the waveform file to be detected according to the target metadata, wherein the change value sequence comprises edge time points of the clock signal to be detected in the target time period and logic values corresponding to the edge time points of the clock signal to be detected; The processing module is used for analyzing and processing the change value sequence to obtain clock signal information of the clock signal to be detected, wherein the clock signal information is used for indicating the state change condition of the clock signal to be detected in the target time period.
  9. 9. An electronic device, comprising: A memory storing executable program code; A processor coupled to the memory; The processor invokes the executable program code stored in the memory to perform the method of any of claims 1-7.
  10. 10. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method according to any of claims 1-7.

Description

Clock signal processing method and device, electronic equipment and storage medium Technical Field The present application relates to the field of computer technologies, and in particular, to a clock signal processing method, a clock signal processing device, an electronic device, and a storage medium. Background The clock signal is a global timing reference of the chip function, and the accuracy of the clock signal directly influences the stability of the system, the power consumption performance and the timing convergence effect. Therefore, clock accuracy is the most fundamental condition of the chip and is also the key point of the chip verification stage. In the verification link, control conditions related to the clock, such as frequency point adjustment, clock opening and closing, can be randomly controlled, and the correctness of the clock component functions can be checked according to the actual condition of the simulation waveform. Currently, verification of clock accuracy is achieved manually by a technician analyzing waveforms one by one to determine whether the clock response meets expectations. However, the manual verification mode has obvious limitations of low efficiency and difficulty in adapting to the verification requirement of a large-scale chip. Disclosure of Invention The application provides a clock signal processing method, a device, electronic equipment and a storage medium, which are used for improving the detection efficiency of a clock signal. According to a first aspect, an embodiment of the application provides a clock signal processing method, which comprises the steps of obtaining a to-be-detected waveform file and target metadata of a to-be-detected clock signal, wherein the to-be-detected waveform file comprises simulation results corresponding to the to-be-detected clock signal in a target time period, analyzing and obtaining a change value sequence of the to-be-detected clock signal from the to-be-detected waveform file according to the target metadata, wherein the change value sequence comprises edge time points of the to-be-detected clock signal in the target time period and logic values corresponding to each edge time point of the to-be-detected clock signal, and analyzing and processing the change value sequence to obtain clock signal information of the to-be-detected clock signal, wherein the clock signal information is used for indicating state change conditions of the to-be-detected clock signal in the target time period. In the embodiment of the application, the change value sequence used for representing the edge information of the clock signal to be detected is automatically analyzed from the waveform file to be detected through the target metadata of the clock signal to be detected, and then the clock signal information of the clock signal to be detected is analyzed. The method realizes the automation of clock waveform analysis and clock signal information acquisition, effectively solves the problems of low detection efficiency and easy error in a manual waveform observation mode, and improves the detection efficiency and accuracy of the clock signal. In one possible implementation manner, the waveform file to be detected comprises simulation results of a plurality of clock signals of different signal levels, the plurality of clock signals comprise the clock signals to be detected, the target metadata comprise signal levels and names of the clock signals to be detected, the sequence of change values of the clock signals to be detected is obtained by analyzing the waveform file to be detected according to the target metadata, the identifier of the clock signals to be detected is obtained by analyzing header information of the waveform file to be detected according to the signal levels and names of the clock signals to be detected, the header information comprises metadata of the clock signals, and the sequence of change values is obtained by analyzing a plurality of edge time points and logic values corresponding to each edge time point of the clock signals to be detected according to the identifier. In this embodiment, when the waveform file to be detected includes simulation results of a plurality of clock signals with different signal levels, a change value sequence matched with the clock signal to be detected may be accurately located and resolved from the waveform file to be detected according to the signal levels and names of the clock signals to be detected, so as to obtain corresponding clock signal information by analyzing the change value sequence. By implementing the embodiment, a plurality of clock signals can be processed in parallel, and the automatic processing of the plurality of clock signals can be realized. It can be seen that this embodiment can also efficiently adapt to the complex verification requirements of large-scale chips. In one possible implementation manner, before the obtaining of the target metadata of the to-be-detected waveform