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CN-121996050-A - Electronic equipment, chip, IIC interface device and power consumption control method thereof

CN121996050ACN 121996050 ACN121996050 ACN 121996050ACN-121996050-A

Abstract

The application discloses an electronic device, a chip, an IIC interface device and a power consumption control method thereof, wherein the power consumption control method comprises the steps of setting at least two address comparison points in the address of a received access instruction, wherein the access instruction at least comprises an address and an operation word; and performing address matching on each address comparison point and the address of the IIC equipment in the low-power consumption state, and determining whether to wake up the IIC equipment according to the address matching result of at least two times. The application can greatly reduce the power consumption and reduce the possibility of false awakening.

Inventors

  • SU HEPENG

Assignees

  • 集创北方(深圳)科技有限公司

Dates

Publication Date
20260508
Application Date
20251222

Claims (11)

  1. 1. A power consumption control method for an IIC interface device, comprising: Setting at least two address comparison points in the address of a received access instruction, wherein the access instruction at least comprises an address and an operation word; Address matching with the address of the IIC device in the low power consumption state at each address comparison point, and And determining whether to wake up the IIC equipment according to the address matching result of at least two times.
  2. 2. The power consumption control method according to claim 1, characterized by further comprising: and returning a response instruction generated by the IIC equipment when the IIC equipment is awakened and the access instruction is read.
  3. 3. The power consumption control method according to claim 1, wherein determining whether to wake up the IIC device according to the at least two address matching results comprises: determining whether to start the power and clock of the IIC device based on the address matching result of the address comparison point before the last address comparison point, and And under the condition of starting the power supply and the clock of the IIC equipment, determining whether to wake up the IIC equipment according to the address matching result at the last address comparison point.
  4. 4. A power consumption control method according to any one of claims 1 to 3, wherein setting at least two address comparison points in the address of the received access instruction comprises: Setting a first address comparison point at an nth bit of an address of the access instruction; a second address compare point is set at the mth bit of the address of the access instruction, The address in the access instruction comprises m bits, n < m, n and m are positive integers.
  5. 5. The power consumption control method according to claim 4, wherein m-n >1.
  6. 6. The power consumption control method according to claim 4, wherein address matching with the address of the IIC device in the low power consumption state at each address comparison point comprises: at the first address comparison point, performing a first address match of the first n bits of the address in the access instruction with the first n bits of the address in the IIC device, and And at the second address comparison point, performing second address matching on the complete address in the access instruction and the complete address of the IIC equipment.
  7. 7. The method for controlling power consumption according to claim 6, wherein, And starting the power supply and the clock of the IIC equipment when the first address matching is successful, and continuing to perform the second address matching, otherwise ending the address matching between the IIC equipment and the access instruction.
  8. 8. The power consumption control method of claim 6, wherein the IIC device is woken up when the second address matching is successful, and otherwise the power and clock of the IIC device are turned off.
  9. 9. An IIC interface device, comprising: the setting unit is used for setting at least two address comparison points in the address of the received access instruction, wherein the access instruction at least comprises an address and an operation word; an addressing unit for performing address matching with the address of the IIC device in a low power consumption state at each address comparison point, and And the control unit is used for determining whether to wake up the IIC equipment according to the at least two address matching results.
  10. 10. An electronic device comprising the IIC interface apparatus of claim 9.
  11. 11. A chip comprising the IIC interface device of claim 9.

Description

Electronic equipment, chip, IIC interface device and power consumption control method thereof Technical Field The application relates to the technical field of communication, in particular to electronic equipment, a chip, an IIC interface device and a power consumption control method thereof. Background As mobile electronic devices become more popular, their functionality is also increasingly required. Mobile electronic devices typically consist of a master control and a number of peripheral devices, with the functions of the mobile electronic device gradually moving down onto the peripheral devices (e.g., wearable devices). The screen of the wearable device may be very short in duration when it is on or operating for a long time. Frequent charging can cause great inconvenience to the user, and the thermal sensation caused by excessive power consumption of the device can also cause bad user experience. In order to achieve the purposes of light weight, low power consumption, excellent user experience and the like, when no transaction needs to be processed, the peripheral equipment enters a low power consumption mode. Taking the example of using IIC as the slave device interface by the peripheral device. In order to respond to the access command at any time, the peripheral device generally turns off only part of the clock when no transaction needs to be processed, but the scheme cannot reduce the power consumption to an ideal target. Or a special wake-up pin is arranged on the peripheral equipment, when the peripheral equipment is required to be accessed, the peripheral equipment is triggered to exit from the low-power consumption mode to the working mode through the special wake-up pin, however, the integrated cost of the system is increased due to the addition of the special wake-up pin, and the wake-up flow is more complex. Disclosure of Invention In order to solve the technical problems, the application provides electronic equipment, a chip, an IIC interface device and a power consumption control method thereof, wherein the electronic equipment, the chip and the IIC interface device can reduce power consumption and wake-up by mistake. According to one aspect of the application, a power consumption control method for an IIC interface device is provided, and the power consumption control method comprises the steps of setting at least two address comparison points in an address of a received access instruction, wherein the access instruction at least comprises an address and an operation word, performing address matching on each address comparison point and an address of IIC equipment in a low power consumption state, and determining whether to wake up the IIC equipment according to the address matching result of at least two times. Optionally, the method further comprises the step of returning a response instruction generated by the IIC equipment when the IIC equipment is awakened and the access instruction is read. Optionally, determining whether to wake up the IIC device according to the at least two address matching results includes determining whether to start up a power supply and a clock of the IIC device according to an address matching result of an address comparison point before a last address comparison point, and determining whether to wake up the IIC device according to an address matching result of the last address comparison point in case of starting up the power supply and the clock of the IIC device. Optionally, setting at least two address comparison points in the address of the received access instruction comprises setting a first address comparison point at the nth bit of the address of the access instruction and setting a second address comparison point at the mth bit of the address of the access instruction, wherein the address in the access instruction comprises m bits, n < m, n, m is a positive integer. Alternatively, m-n >1. Optionally, address matching with the addresses of the IIC devices in the low power consumption state at each address comparison point comprises performing first address matching on the first n bits of the addresses in the access instruction and the first n bits of the addresses of the IIC devices at the first address comparison point, and performing second address matching on the complete addresses in the access instruction and the complete addresses of the IIC devices at the second address comparison point. Optionally, when the first address matching is successful, starting the power supply and the clock of the IIC device, and continuing the second address matching, otherwise ending the address matching between the IIC device and the access instruction. Optionally, the IIC device is awakened when the second address matching is successful, otherwise, the power supply and the clock of the IIC device are turned off. According to another aspect of the present application, there is provided an IIC interface device including a setting unit setting at least two addres