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CN-121996053-A - Frequency adjustment method, device, electronic equipment and storage medium

CN121996053ACN 121996053 ACN121996053 ACN 121996053ACN-121996053-A

Abstract

The application discloses a frequency adjustment method, a device, an electronic device, a storage medium and a computer program product, which belong to the technical field of computers, wherein the method comprises the steps of determining the frequency upper limit value of a double data rate synchronous dynamic random access memory DDR of the electronic device based on the operation parameters of a processor of the electronic device; when the DDR operating frequency is higher than the frequency upper limit value, the DDR operating frequency is reduced, and the adjusted DDR operating frequency is lower than or equal to the frequency upper limit value.

Inventors

  • Huang Huxing

Assignees

  • 维沃移动通信有限公司

Dates

Publication Date
20260508
Application Date
20260129

Claims (12)

  1. 1. A method of frequency adjustment, performed by an electronic device, the method comprising: determining a frequency upper limit value of a double data rate synchronous dynamic random access memory DDR of the electronic equipment based on an operation parameter of a processor of the electronic equipment; and under the condition that the operating frequency of the DDR is higher than the frequency upper limit value, the operating frequency of the DDR is regulated down, and the regulated operating frequency of the DDR is lower than or equal to the frequency upper limit value.
  2. 2. The method of claim 1, wherein after determining the upper frequency limit for the DDR of the electronic device based on the operating parameters of the processor of the electronic device, the method further comprises: determining load change information of the processor based on the operating parameters of the processor; And adjusting the frequency upper limit value based on the load change information of the processor.
  3. 3. The method of claim 2, wherein adjusting the upper frequency limit based on the processor's load change information comprises: in case of detecting the load increase of the processor, the frequency upper limit value is increased, or The upper frequency limit is adjusted down in the event that a decrease in the load of the processor is detected.
  4. 4. The method of claim 1, wherein the operating parameters of the processor include N operating parameters of the processor, N being an integer greater than 1, and wherein determining the upper frequency limit for DDR of the electronic device based on the operating parameters of the processor of the electronic device comprises: determining N frequency values corresponding to the operation parameters of the N processors respectively; and determining the maximum frequency value in the N frequency values as the frequency upper limit value.
  5. 5. The method of claim 1, wherein the determining the frequency upper limit of the DDR of the electronic device based on the operating parameters of the processor of the electronic device comprises: and determining the DDR frequency upper limit value of the electronic equipment based on the operation parameters of the processor of the electronic equipment under the condition that the electronic equipment is not in a high load state.
  6. 6. The frequency adjusting device is characterized by being applied to electronic equipment and comprises a determining module and an adjusting module; the determining module is used for determining the DDR frequency upper limit value of the electronic equipment based on the operation parameters of the processor of the electronic equipment; the adjusting module is configured to adjust the operating frequency of the DDR when the operating frequency of the DDR is higher than the frequency upper limit value determined by the determining module, where the adjusted operating frequency of the DDR is lower than or equal to the frequency upper limit value.
  7. 7. The apparatus of claim 6, wherein the determining module is further configured to determine load change information of the processor based on the operating parameter of the processor after determining the upper frequency limit of the DDR of the electronic device based on the operating parameter of the processor; The adjusting module is further configured to adjust the frequency upper limit value based on the load change information of the processor determined by the determining module.
  8. 8. The apparatus of claim 7, wherein the adjustment module is specifically configured to: in case of detecting the load increase of the processor, the frequency upper limit value is increased, or The upper frequency limit is adjusted down in the event that a decrease in the load of the processor is detected.
  9. 9. The apparatus of claim 6, wherein the operating parameters of the processors comprise operating parameters of N processors, N being an integer greater than 1; The determining module is specifically configured to determine N frequency values corresponding to the operation parameters of the N processors, and determine a maximum frequency value of the N frequency values as the frequency upper limit value.
  10. 10. The apparatus according to claim 6, wherein the determining module is configured to determine the upper frequency limit of the DDR of the electronic device based on an operating parameter of a processor of the electronic device when the electronic device is not in a high load state.
  11. 11. An electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the frequency adjustment method of any one of claims 1 to 5.
  12. 12. A readable storage medium, characterized in that the readable storage medium has stored thereon a program or instructions which, when executed by a processor, implement the steps of the frequency adjustment method according to any of claims 1 to 5.

Description

Frequency adjustment method, device, electronic equipment and storage medium Technical Field The application belongs to the technical field of computers, and particularly relates to a frequency adjustment method, a frequency adjustment device, electronic equipment, a storage medium and a computer program product. Background A double data rate synchronous dynamic random Access Memory (DDR SDRAM) is a core component of an electronic device, referred to as DDR. In the related art, in order to meet the bandwidth requirements of core components (e.g., central processing unit (Central Processing Unit, CPU)), the frequency of DDR is always in high gear. As such, power consumption of the electronic device is significantly high. Disclosure of Invention An object of an embodiment of the present application is to provide a frequency adjustment method, apparatus, electronic device, storage medium, and computer program product, which can reduce power consumption of the electronic device without affecting performance of the electronic device. In a first aspect, an embodiment of the present application provides a frequency adjustment method, where the frequency adjustment method includes determining a frequency upper limit value of a DDR of an electronic device based on an operation parameter of a processor of the electronic device, and adjusting a working frequency of the DDR to be lower than or equal to the frequency upper limit value when the working frequency of the DDR is higher than the frequency upper limit value. In a second aspect, an embodiment of the present application provides a frequency adjustment device, where the frequency adjustment device includes a determining module and an adjusting module. And the determining module is used for determining the DDR frequency upper limit value of the electronic equipment based on the operation parameters of the processor of the electronic equipment. And the adjusting module is used for adjusting down the operating frequency of the DDR under the condition that the operating frequency of the DDR is higher than the frequency upper limit value determined by the determining module, and the adjusted operating frequency of the DDR is lower than or equal to the frequency upper limit value. In a third aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the method as described in the first aspect. In a fourth aspect, embodiments of the present application provide a readable storage medium having stored thereon a program or instructions which when executed by a processor perform the steps of the method according to the first aspect. In a fifth aspect, an embodiment of the present application provides a chip, where the chip includes a processor and a communication interface, where the communication interface is coupled to the processor, and where the processor is configured to execute a program or instructions to implement a method according to the first aspect. In a sixth aspect, embodiments of the present application provide a computer program/program product stored in a storage medium, the program/program product being executable by at least one processor to implement the method according to the first aspect. In the embodiment of the application, the frequency upper limit value of the DDR of the electronic equipment is determined based on the operation parameters of the processor of the electronic equipment, and the DDR is adjusted to be lower than or equal to the frequency upper limit value when the DDR is higher than the frequency upper limit value. In the scheme, the frequency upper limit value of the DDR of the electronic equipment can be determined based on the operation parameters of the processor of the electronic equipment, and then the operating frequency of the DDR is controlled not to exceed the frequency upper limit value, so that the matching of the operating frequency of the DDR and the operation requirement of the processor is realized, and the DDR is prevented from being in a state of high-frequency operation all the time. Therefore, the power consumption of the electronic equipment is reduced while the performance of the electronic equipment is not affected. Drawings FIG. 1 is a flow chart of a frequency adjustment method provided by some embodiments of the present application; FIG. 2 is a flow chart of a frequency adjustment method provided by some embodiments of the present application; FIG. 3 is a flow chart of a frequency adjustment method provided by some embodiments of the present application; FIG. 4 is a flow chart of a frequency adjustment method provided by some embodiments of the present application; FIG. 5 is a flow chart of a frequency adjustment method provided by some embodiments of the present application; fig. 6 is a schematic structural diagram of a frequency a