CN-121996142-A - Flash memory controller, control method of flash memory controller and electronic device using flash memory controller

Abstract

The invention discloses a flash memory controller which is used for accessing a flash memory module. The flash memory controller comprises a buffer memory, a microprocessor and a counter. A portion of the buffer memory is used to temporarily store the write read command code associated with processing a write or read in the system internal code. The counter generates a count value in response to the number of times the microprocessor continuously receives a write or read command. The microprocessor sets a partial area of the buffer memory as a non-holding memory, and after receiving the sleep command, when the count value is greater than or equal to a preset count value, sets the partial area of the buffer memory as a holding memory, makes the flash memory controller enter a power saving mode, and closes the non-holding memory. The invention also discloses a control method of the flash memory controller and an electronic device applied by the same.

Inventors

• CHEN ZHIXIAO

Assignees

• 深圳市欣芯半导体有限公司

Dates

Publication Date

20260508

Application Date

20241101

Claims (11)

1. 1. A flash memory controller for accessing a flash memory module, comprising: A buffer memory for temporarily storing a system internal program code, and a partial area of the buffer memory is used for temporarily storing a write-read command program code associated with processing writing or reading in the system internal program code; A microprocessor for executing the system internal program code to control access to the flash memory module, and A counter for generating a count value in response to the number of times the microprocessor continuously receives a write command or a read command; The microprocessor sets the partial area of the buffer memory as a non-holding memory, and after receiving a sleep command, when the count value is greater than or equal to a preset count value, sets the partial area of the buffer memory as a holding memory, makes the flash memory controller enter the power saving mode and closes the non-holding memory.
2. 2. The flash memory controller of claim 1, wherein the write command or the read command is sent by a host-side device.
3. 3. The flash controller of claim 1, further comprising: After receiving the sleep command, when the count value is smaller than the preset count value, directly enabling the flash memory controller to enter the power saving mode and closing the non-holding memory, and When the flash memory controller enters the working mode from the power saving mode, the microprocessor reads the write-read command program code which is related to processing writing or reading in the system internal program code from the flash memory module to the partial area of the buffer memory.
4. 4. The flash memory controller of claim 1, wherein the microprocessor sets the partial area of the buffer memory to the non-holding memory after the flash memory controller enters the operating mode from the power saving mode.
5. 5. An electronic device, comprising: A flash memory module, and A flash memory controller for accessing the flash memory module, wherein the flash memory controller comprises: A buffer memory for temporarily storing a system internal program code, and a part of the buffer memory for temporarily storing a write-read command program code associated with processing writing or reading in the system internal program code, and A microprocessor for executing the system internal program code to control access to the flash memory module, and A counter for generating a count value in response to the number of times the microprocessor continuously receives a write command or a read command; The microprocessor sets the partial area of the buffer memory as a non-holding memory, and after receiving a sleep command, when the count value is greater than or equal to a preset count value, sets the partial area of the buffer memory as a holding memory, makes the flash memory controller enter the power saving mode, and closes the non-holding memory.
6. 6. The electronic device of claim 5, wherein the write command or the read command is sent by a host-side device.
7. 7. The electronic device of claim 5, further comprising: After receiving the sleep command, when the count value is smaller than the preset count value, directly enabling the flash memory controller to enter the power saving mode and closing the non-holding memory, and When the flash memory controller enters the working mode from the power saving mode, the microprocessor reads the write-read command program code which is related to processing writing or reading in the system internal program code from the flash memory module to the partial area of the buffer memory.
8. 8. The electronic device of claim 5, wherein the microprocessor sets the partial area of the buffer memory to the non-holding memory after the flash memory controller enters the operating mode from the power saving mode.
9. 9. A control method of a flash memory controller, wherein the flash memory controller is used for accessing a flash memory module, the control method of the flash memory controller comprises: setting a part of the area of the program code of the write-read command associated with processing writing or reading in the internal program code of the temporary storage system in a buffer memory as a non-holding memory; accumulating a counter from 0 according to the number of times that a microprocessor continuously receives a write command or a read command, so as to generate a count value; When a sleep command is received, judging if the count value is greater than or equal to a preset count value, and When the count value is greater than or equal to the preset count value, setting the partial area of the buffer memory as a reserved memory, enabling the flash memory controller to enter the power saving mode, and closing the non-reserved memory.
10. 10. The method for controlling a flash memory controller according to claim 9, further comprising: After receiving the sleep command, when the count value is smaller than the preset count value, directly enabling the flash memory controller to enter the power saving mode and closing the non-holding memory, and When the flash memory controller enters a working mode from the power saving mode, the microprocessor reads the write-read command program code which is associated with processing writing or reading in the system internal program code from the flash memory module to the partial area of the buffer memory.
11. 11. The method for controlling a flash memory controller according to claim 9, further comprising: When the flash memory controller enters the working mode from the power saving mode, the microprocessor sets the partial area of the buffer memory as the non-holding memory.

Description

Flash memory controller, control method of flash memory controller and electronic device using flash memory controller Technical Field The present invention relates to the field of computer technologies, and in particular, to a flash memory controller and a control method thereof. Background Flash memory (Flash memory) belongs to non-volatile solid-state storage memory, and is widely applied to memory cards and portable discs, and is also widely applied to mobile electronic devices in recent years. In use, the flash memory is typically used in conjunction with a flash memory controller to manage data stored in the flash memory and communicate with a computer or electronic device. The flash Memory controller typically enters a power saving mode when it does not receive an Access command from the host device, and turns off a Static Random-Access Memory (SRAM) power supply to save power consumption. Since a portion of the sram is turned off, a portion of the system internal program code (In-System Programming (ISP) that is originally stored therein is lost, and therefore, when the flash memory controller enters the operation mode from the power saving mode, it is necessary to read the ISP code from the flash memory module again to the sram, and then the access command of the host device can be normally received and the flash memory module can be accessed. However, since the amount of data of the ISP code is large, the flash memory controller needs more time to read the ISP code, which results in that the flash memory controller needs longer time to process the access command from the host device when leaving the power saving mode, thereby reducing the performance of the overall system. Therefore, it is an important object to provide a flash memory controller, a control method of the flash memory controller and an electronic device using the same, which can improve the above problems. Disclosure of Invention In order to achieve the above-mentioned object, the present invention provides a flash memory controller, a control method of the flash memory controller and an electronic device using the same, which can set a specific area in a buffer memory to be a memory according to specific conditions before the flash memory controller enters a power saving mode, so as to avoid a program code temporarily stored in the memory from being disappeared after entering the power saving mode. The invention provides a flash memory controller which is used for accessing a flash memory module. The flash memory controller comprises a buffer memory, a microprocessor and a counter. The buffer memory is used for temporarily storing a system internal program code, and a part of the area of the buffer memory is used for temporarily storing a write-read command program code associated with processing writing or reading in the system internal program code. The microprocessor is used for executing system internal program codes to control the access to the flash memory module. The counter generates a count value in response to the microprocessor continuously receiving a write command or a read command. The microprocessor sets a partial area of the buffer memory as a non-retention memory, and after receiving a sleep command, when the count value is greater than or equal to a preset count value, sets the partial area of the buffer memory as a retention memory, makes the flash memory controller enter a power saving mode, and closes the non-retention memory. In one embodiment, the write command or the read command is sent by a host device. In one embodiment, after receiving the sleep command, when the count value is smaller than the preset count value, the flash memory controller directly enters a power saving mode and closes the non-retention memory. And when the flash memory controller enters the working mode from the power saving mode, the microprocessor reads the write-read command program code which is related to processing writing or reading in the internal program code of the system from the flash memory module to a partial area of the buffer memory. In one embodiment, after the flash memory controller enters the operation mode from the power saving mode, the microprocessor sets a partial area of the buffer memory as the non-holding memory. In addition, the invention also provides an electronic device which comprises a flash memory module and a flash memory controller which are electrically connected with each other. The flash memory controller is used for accessing the flash memory module and comprises a buffer memory, a microprocessor and a counter. The buffer memory is used for temporarily storing a system internal program code, and a part of the area of the buffer memory is used for temporarily storing a write-read command program code associated with processing writing or reading in the system internal program code. The microprocessor is used for executing system internal program codes to control the access to the flash memory mod