CN-121996150-A - Method and apparatus for read disturb detection for memory devices for complete data control

Abstract

Methods and apparatus for read disturb detection of a memory device for complete control of data by means of hash-based address mapping are provided. The method may include establishing a read count table to record a plurality of first read counts for a plurality of first addresses, performing a hash-based address mapping of a set of second addresses for which read operations are detected to convert the set of second addresses to a set of first addresses of the plurality of first addresses for updating the set of first read counts, monitoring at least one highest first read count to determine if the highest first read count reaches a first read count threshold, performing a reverse mapping of the first address for which the highest first read count is detected to convert the first address to a target second address, and performing a media scanning procedure for the target second address.

Inventors

• YANG ZONGJIE

Assignees

• 慧荣科技股份有限公司

Dates

Publication Date

20260508

Application Date

20250506

Priority Date

20241108

Claims (19)

1. 1. A method for read-disturb (disturbance) detection of a memory device for data integrity control (DATA INTEGRITY control) by means of hash-based address mapping, the method being applicable to a memory controller of the memory device, the memory device comprising the memory controller and a non-volatile (NV) memory, the non-volatile memory comprising at least one non-volatile memory element, the method comprising: Establishing a read count table (read count table) for recording a plurality of first read counts (read counts) for a plurality of first addresses, wherein the plurality of first addresses belong to a first memory address space smaller than a second memory address space; performing the hash-based address mapping on a set of second addresses for which read operations are detected to translate the set of second addresses to a set of first addresses of the plurality of first addresses for updating a set of first read counts of the plurality of first read counts on the read count table with respect to the set of first addresses, wherein the set of second addresses belong to the second memory address space; Monitoring at least one highest first read count of the plurality of first read counts on the read count table to determine whether the highest first read count reaches a first read count threshold; In response to the highest first read count reaching the first read count threshold, reverse mapping (REVERSE MAPPING) the hash-based address mapping to a first address at which the highest first read count was detected to convert the first address to all second addresses corresponding to the first address as a set of target second addresses, and A media scan process (MEDIA SCAN processes) is performed for each of the set of target second addresses to maintain data integrity (DATA INTEGRITY) of the data in the non-volatile memory.
2. 2. The method of claim 1, wherein the plurality of second addresses belonging to the second memory address space represent a plurality of physical addresses of the non-volatile memory accessible (accessible) by the memory controller, wherein the plurality of second addresses includes the set of second addresses.
3. 3. The method of claim 1, wherein the memory controller is configured to record the plurality of first read counts for the plurality of first addresses on the read count table without recording a plurality of second read counts for the plurality of second addresses on any other read count table that is larger than the read count table.
4. 4. The method of claim 3, wherein the memory controller is configured to monitor at least the highest first read count of the plurality of first read counts on the read count table to determine whether the highest first read count reaches the first read count threshold without monitoring any highest second read count of the plurality of second read counts on any other read count table to determine whether the highest second read count reaches any second read count threshold.
5. 5. The method of claim 1, wherein converting the set of second addresses to the set of first addresses of the plurality of first addresses further comprises: the set of second addresses is converted to the set of first addresses of the plurality of first addresses using a hash function (hash function).
6. 6. The method of claim 5, wherein converting the first address into the all second addresses corresponding to the first address further comprises: The first address is converted to all the second addresses corresponding to the first address using an inverse hash function (REVERSE HASHING functions).
7. 7. The method of claim 6, wherein the inverse hash function is implemented as a multi-valued function (multivalued function) for performing the inverse mapping.
8. 8. The method of claim 1 wherein the hash-based address map represents a first map for mapping any one of a plurality of inputs of the first map to a same one of a plurality of outputs of the first map.
9. 9. The method of claim 8 wherein the first mapping is implemented by a modulo function (modulo function).
10. 10. The method of claim 1, wherein the reverse map represents a second map for mapping any one of a plurality of inputs of the second map to a same group of outputs of a plurality of groups of outputs of the second map.
11. 11. The method of claim 1, wherein the all second addresses corresponding to the first address represent all second addresses mapped to the first address in the hash-based address map.
12. 12. The method of claim 1 wherein performing the media scan procedure for the set of target second addresses, respectively, further comprises: Reading at least one physical location neighbor page (physical location neighbor page) of a page located at any of the set of target second addresses to generate at least one read result of the at least one physical location neighbor page for determining whether the at least one physical location neighbor page is healthy, and Any unhealthy ones of the at least one physical location neighbor page are determined to be a read-disturb-effect page (read-disturbance-AFFECTED PAGE) for pre-processing the read-disturb-effect page before the read-disturb-effect page is corrupted.
13. 13. The method of claim 12, further comprising: Writing any local data stored in the read disturb-affected page to a new page located at a new second address to maintain the data integrity of the data in the non-volatile memory, and The read disturb-effect page is marked as an invalid physical page to allow the read disturb-effect page to be corrupted when further reads of the any target second address are performed without degrading the data integrity of the data in the non-volatile memory.
14. 14. The method of claim 13, wherein a plurality of second addresses belonging to the second memory address space represent a plurality of physical addresses of the nonvolatile memory, wherein the plurality of second addresses includes the set of second addresses, wherein the new second address represents one of the plurality of physical addresses, and wherein the method further comprises: at least one logical-to-physical (L2P) address mapping table in the non-volatile memory is updated to record a relationship between the physical address and a logical address of any local data.
15. 15. The method of claim 12, further comprising: Reading at least one other physical location neighbor page of another page located at any other target second address of the set of target second addresses to generate at least one other read result of the at least one other physical location neighbor page for determining whether the at least one other physical location neighbor page is healthy, and The highest read count is selectively reset to zero on the read count table based on whether the at least one other physically located adjacent page is healthy.
16. 16. The method of claim 15 wherein selectively resetting the highest first read count to zero on the read count table based on whether the at least one other physically located adjacent page is healthy further comprises: resetting the highest first read count to zero on the read count table if the at least one other physical location is determined to be healthy adjacent to the page, and If it is determined that the at least one other physically located adjacent page is unhealthy, the highest first read count is reduced to a non-zero value (non-zero value) on the read count table instead of resetting the highest read count to zero to allow for a higher probability of occurrence of the media scan procedure for at least one remaining target second address of the set of target second addresses excluding the any target second address than for another set of target second addresses corresponding to another first address, wherein the at least one remaining target second address includes the any other target second address.
17. 17. A memory controller for performing read-disturb (read-disturbance) detection of a memory device for data integrity control (DATA INTEGRITY control) by means of hash-based (based) address mapping, the memory device comprising the memory controller and a non-volatile memory (NV memory), the non-volatile memory comprising at least one non-volatile memory element, the memory controller comprising: A processing circuit for controlling the memory controller according to a plurality of host commands from a host device to allow the host device to access the nonvolatile memory through the memory controller; Wherein: The memory controller is configured to establish a read count table (read count table) for recording a plurality of first read counts (read counts) for a plurality of first addresses, wherein the plurality of first addresses belong to a first memory address space that is smaller than a second memory address space; The memory controller is configured to perform the hash-based address mapping on a set of second addresses for which read operations are detected to translate the set of second addresses to a set of first addresses of the plurality of first addresses for updating a set of first read counts of the plurality of first read counts on the read count table, wherein the set of second addresses belongs to the second memory address space; the memory controller is configured to monitor at least one highest first read count of the plurality of first read counts on the read count table to determine whether the highest first read count reaches a first read count threshold; Responsive to the highest first read count reaching the first read count threshold, the memory controller is configured to reverse map (REVERSE MAPPING) the hash-based address map for a first address at which the highest first read count was detected to convert the first address to all second addresses corresponding to the first address as a set of target second addresses, and The memory controller is configured to perform a media scanning procedure (MEDIA SCAN processes) for each of the set of target second addresses to maintain data integrity (DATA INTEGRITY) of the data in the non-volatile memory.
18. 18. A memory device comprising the memory controller of claim 17, wherein the memory device comprises: the non-volatile memory is used for storing information, and The memory controller is coupled to the nonvolatile memory and is used for controlling the operation of the memory device.
19. 19. An electronic device comprising the memory device of claim 18, wherein the electronic device comprises: The host device is coupled to the memory device, wherein the host device comprises: at least one processor for controlling the operation of the host device, and A power supply circuit coupled to the at least one processor for providing power to the at least one processor and the memory device; Wherein the memory device provides storage space for the host device.

Description

Method and apparatus for read disturb detection for memory devices for complete data control Technical Field The present invention relates to memory control, and more particularly, to a method for performing read-disturb (read-disturbance) detection of a memory device for data integrity control (DATA INTEGRITY control) by means of hash-based (hash-based) address mapping, and related apparatus (appaatus) such as the memory device, an electronic device including the memory device, a memory controller within the memory device, etc. Background Memory devices may include flash memory for storing data, and access (access) management for flash memory is complex. For example, the memory device may be a memory card, an embedded storage device, or a solid state hard disk (SSD) such as an SSD compliant with the PCI express (PERIPHERAL COMPONENTINTERCONNECT EXPRESS, PCIe) specification. The memory device can be used to store various files, such as system files, user files, etc., in the file system of the host. More specifically, the memory device such as PCIe SSD is very suitable for database application on a computer due to its speed, low latency, scalability, reliability, and support for advanced protocols such as NVMe, and can significantly improve the efficiency and response speed of the database system, thereby improving the efficiency and user experience. According to the related art, a database system may divide a PCIe SSD into a plurality of data spaces of different sizes for different usage scenarios, and simultaneously read the different data spaces in parallel, wherein it is easier to frequently read an archive directory area or an index area of the database, and such an application scenario may easily cause a single logical block address (logicalblock address, LBA) to be excessively read, thereby causing serious single page read interference. Such read disturb may affect the data accuracy of corresponding locations in an upper or lower layer of a three-dimensional (3D) stacked structure of flash memory. The erased state of the corresponding position may be shifted, thereby causing an uncorrectable error. In the case where the page of the read location is not erroneous and there are many erroneous bits in the physical location neighbor page (physical location neighbor page), it is desirable to efficiently detect read disturb errors because the read location itself is not an erroneous location. In view of the above, some suggestions may be made to try to solve the problems, but additional problems such as some side effects may be introduced. For example, a first proposal may involve data block refreshing (data block refresh) of a superblock when it is detected that the number of read operations of the superblock reaches a threshold. Since data may be refreshed too frequently, SSDs may be subject to frequent garbage collection (garbage collection, GC), resulting in reduced SSD performance. In another example, the second proposal may involve refreshing a block of data when it is detected that the number of read operations for that block reaches a threshold, but the controller integrated circuit (INTEGRATED CIRCUIT, abbreviated IC) associated with this proposal may require external memory to store the relevant records, since the internal storage space of the controller IC is typically insufficient and the records in the external memory must be updated after each read operation. In addition, single page read disturb cannot be completely overcome and it may be necessary to set the threshold low, which will result in some proportion of garbage refresh. In addition, the above-described mechanism for performing data block refresh may result in performance degradation in current and future high-stack 3D flash memory applications. There appears to be no suitable suggestion in the related art. Thus, there is a need for a novel approach and related architecture to address these issues without introducing side effects or by a way that is less likely to introduce side effects. Disclosure of Invention It is therefore an object of the present invention to provide a method for data integrity control by means of hash-based address mapping for read disturb detection of a memory device, and related apparatus, such as the memory device, an electronic device comprising the memory device, a memory controller within the memory device, etc., to solve the above-mentioned problems. At least one embodiment of the present invention provides a method for performing read disturb detection of a memory device for complete data control by means of hash-based address mapping, which can be applied to a memory controller of the memory device. The memory device may include a memory controller and non-volatile (NV) memory, and the NV memory may include at least one NV memory element (e.g., one or more NV memory elements). The method may include creating a read count table (read count table) for recording a plurality of first read counts (read coun