CN-121996296-A - Communication device, method, electronic device, storage medium, and program

CN121996296ACN 121996296 ACN121996296 ACN 121996296ACN-121996296-A

Abstract

The embodiment of the invention discloses a communication device, a method, electronic equipment, a storage medium and a program, wherein the communication device is integrated in a processor and is used for receiving a current instruction and determining the instruction type of the current instruction, sending the current instruction to a lower module for carrying out a subsequent instruction processing flow under the condition that the instruction type of the current instruction is determined to be a non-aligned instruction, acquiring the instruction execution result of a precursor target associated instruction of the current instruction under the condition that the instruction type of the current instruction is determined to be an aligned instruction, and executing the aligned instruction processing flow of the current instruction under the condition that the instruction execution result of the precursor target associated instruction of the current instruction is determined to be execution completion. The technical scheme of the embodiment of the invention can efficiently ensure the order completion of the instructions, reduce the delay of order preservation processing of the instructions and further improve the overall communication performance.

Inventors

DENG LIANGCE
YANG FAN
ZHANG YALIN
ZHOU FENG
ZOU XINGQI
AN CHENG
He Eqin
MA XIANTONG
WANG JIANBING

Assignees

上海燧原科技股份有限公司

Dates

Publication Date: 20260508
Application Date: 20260409

Claims (13)

1. A communication device, characterized in that, the communication device is integrated within the processor for: Receiving a current instruction and determining the instruction type of the current instruction; Under the condition that the instruction type of the current instruction is determined to be a non-aligned instruction, the current instruction is sent to a lower module to carry out a subsequent instruction processing flow; And under the condition that the instruction type of the current instruction is determined to be an alignment instruction, acquiring an instruction execution result of an preamble target associated instruction of the current instruction, and under the condition that the instruction execution results of the preamble target associated instruction of the current instruction are determined to be execution completion, executing an alignment instruction processing flow of the current instruction.
2. The apparatus of claim 1, comprising a first determination module, a second determination module, and an instruction processing module, wherein: The first judging module is in communication connection with the second judging module and is used for receiving the current instruction, determining an instruction processing mode of the current instruction according to the current instruction processing mark state, and sending the current instruction to the second judging module under the condition that the instruction processing mode of the current instruction is determined to be a lower transmission processing mode; the second judging module is in communication connection with the instruction processing module and is used for determining the instruction type of the current instruction, generating a target instruction identification mark according to the instruction type of the current instruction and sending the current instruction and the target instruction identification mark of the current instruction to the instruction processing module; The instruction processing module is used for sending the current instruction to a lower module for carrying out subsequent instruction processing flows under the condition that the instruction type of the current instruction is determined to be the non-aligned instruction according to the target instruction identification mark of the current instruction, acquiring an instruction execution result of a leading target related instruction of the current instruction under the condition that the instruction type of the current instruction is determined to be the aligned instruction according to the target instruction identification mark of the current instruction, and executing the aligned instruction processing flow of the current instruction under the condition that the instruction execution results of the leading target related instruction of the current instruction are determined to be the execution completion.
3. The apparatus of claim 2, wherein the first determination module comprises a determination submodule and an instruction-tag hardware status register, the determination submodule being communicatively coupled to the instruction-tag hardware status register, wherein: The judging sub-module is used for obtaining a state value output by the instruction mark hardware state register, determining a current instruction processing mark state of the current instruction according to the state value, determining an instruction processing mode of the current instruction according to the current instruction processing mark state, and transmitting the current instruction to the second judging module under the condition that the instruction processing mode of the current instruction is determined to be a lower transmission processing mode; The instruction mark hardware state register is used for updating the state value according to the state update indication information output by the instruction processing module.
4. The apparatus of claim 2, wherein the second determination module comprises an instruction operation type register, an opcode determination sub-module, a destination address register, and an instruction tag generation sub-module, the instruction operation type register being communicatively coupled to the opcode determination sub-module, the destination address determination sub-module being communicatively coupled to the destination address register, the opcode determination sub-module and the destination address determination sub-module being further communicatively coupled to the instruction tag generation sub-module, wherein: the instruction operation type register is used for storing the operation type of the alignment instruction; the operation code judging sub-module is used for comparing the operation type of the current instruction according to the operation type of the aligned instruction stored in the instruction operation type register to obtain an operation type comparison result of the current instruction; The destination address register is used for storing the destination address of the alignment instruction; The destination address judging submodule is used for comparing the destination address of the current instruction according to the destination address of the alignment instruction stored in the destination address register to obtain a destination address comparison result of the current instruction; the instruction mark generation sub-module is used for obtaining an operation type comparison result and a destination address comparison result of the current instruction, generating an instruction identification mark of an aligned instruction under the condition that the operation type comparison result and the destination address comparison result are successfully compared, and generating an instruction identification mark of a non-aligned instruction under the condition that the operation type comparison result and/or the destination address comparison result are determined to be failed.
5. The apparatus of claim 3, wherein the instruction processing module comprises a request dispatch response module, a subordinate transmission module, and an alignment instruction processing module, the request dispatch response module communicatively coupled to the subordinate transmission module and to the alignment instruction processing module, wherein: The request distribution response module is used for determining the instruction type of the current instruction according to the target instruction identification mark of the current instruction, and sending the current instruction to the subordinate transmission module under the condition that the instruction type of the current instruction is determined to be the non-aligned instruction; sending the current instruction to the alignment instruction processing module under the condition that the instruction type of the current instruction is determined to be the alignment instruction; the request distribution response module is also used for receiving response information fed back by the subordinate transmission module and the alignment instruction processing module and sending the response information to the subordinate module; the lower transmission module is used for sending the non-aligned instruction to a target lower module for subsequent instruction processing flow, and sending response information returned by the lower stage to the request distribution response module; the alignment instruction processing module is used for updating the current instruction processing mark state of the instruction mark hardware state register into an alignment state value after receiving the alignment instruction, processing the alignment instruction under the condition that the instruction execution results of the preamble target associated instruction of the current instruction are all determined to be execution completion, updating the current instruction processing mark state of the instruction mark hardware state register into a non-alignment state value after determining that the alignment instruction processing is completed, and sending response information of the alignment instruction processing result to the request distribution response module.
6. The apparatus of claim 5, wherein the lower transport module is further configured with an instruction response counter; The instruction response counter is used for updating the instruction count value in real time according to the instruction uplink and downlink transmission stream; The alignment instruction processing module is further used for acquiring a current instruction count value, determining that the instruction execution results of the preamble target associated instruction of the current instruction are all execution completion under the condition that the current instruction count value is determined to be a set value, processing the alignment instruction according to an alignment instruction processing rule, and waiting for the current instruction count value to be updated to the set value under the condition that the current instruction count value is determined to be a non-set value, and processing the alignment instruction according to the alignment instruction processing rule.
7. The apparatus of any of claims 1-6, wherein the communication device is disposed between a peripheral component interconnect express (PCIe) interface module and a bus.
8. The apparatus of claim 7, wherein the communication apparatus is applied to a flow of the GPU direct remote direct memory access GDR or the GPU direct asynchronous communication GDA for performing order preserving processing on a write data operation and a write completion queue CQ operation of the remote direct memory access RDMA network card.
9. The apparatus of claim 8, wherein when the communication apparatus is applied to a flow of a GDR, a partial flow of the GDR comprises the operations of: the RDMA network card reads target data through RDMA operation, and writes the target data into a video memory of the GPU through a PCIe hardware exchange module; the RDMA network card writes CQ information into a main memory in the CPU through the PCIe hardware exchange module; the host program of the CPU polls the address of the CQ to obtain CQ updating information; after obtaining CQ update information, a host program of the CPU calls a program block of the communication device and sends the program block to the GPU; the GPU executes an alignment instruction through the communication device; The host program of the CPU informs the GPU core of using the target data through the write operation notification information.
10. A communication method applied to the communication device of any one of claims 1-9, the method comprising: Receiving a current instruction and determining the instruction type of the current instruction; Under the condition that the instruction type of the current instruction is determined to be a non-aligned instruction, the current instruction is sent to a lower module to carry out a subsequent instruction processing flow; And under the condition that the instruction type of the current instruction is determined to be an alignment instruction, acquiring an instruction execution result of an preamble target associated instruction of the current instruction, and under the condition that the instruction execution results of the preamble target associated instruction of the current instruction are determined to be execution completion, executing an alignment instruction processing flow of the current instruction.
11. An electronic device, characterized in that it comprises at least one processor comprising the communication means according to any of claims 1-9.
12. A computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, the computer instructions for causing a processor to perform the communication method of claim 10 when executed.
13. A computer program product comprising computer programs/instructions which, when executed by a processor, implement the communication method of claim 10.

Description

Communication device, method, electronic device, storage medium, and program Technical Field Embodiments of the present invention relate to the field of communications technologies, and in particular, to a communications apparatus, a method, an electronic device, a storage medium, and a program. Background The order processing instruction is a core foundation for guaranteeing the integrity and semantic accuracy of communication data. In data communication, if the instruction or the data are not processed according to the established sequence, serious deviation may occur in the information restored by the receiving end, which leads to misjudgment or abnormal functions of the system. For example, in serial transmission, data is transmitted bit by bit, and the receiving end must reassemble the bit stream in exactly the order of transmission, otherwise the meaning of the "word" will change, as if "hello" were misspelled into "hello". Therefore, in the communication scenario, how to implement the order preserving function of the instructions is particularly important. At present, when order preservation processing is performed on instructions in the existing communication field, a method of additionally adding software instructions is often adopted for implementation. For example, when the previous instruction is a write data instruction, in order to ensure that the content carried by the write instruction reaches the destination, an additional read data instruction needs to be added after the write instruction, and the written data is read from the destination address corresponding to the write data through the read data instruction, so that after the data is written successfully, other instructions are executed sequentially. The inventor finds that the prior art has the defect in the process of realizing the invention that in practical application, a plurality of additional software instruction instructions are possibly added for order-preserving processing. Each additional software instruction may require a series of operations to be performed in a corresponding serial manner, thus causing a large delay and severely affecting overall communication performance. Disclosure of Invention The embodiment of the invention provides a communication device, a communication method, electronic equipment, a storage medium and a program, which can efficiently ensure that instructions are completed in sequence, reduce the delay of instruction order-preserving processing and further improve the overall communication performance. According to an aspect of the present invention, there is provided a communication device integrated within a processor for: Receiving a current instruction and determining the instruction type of the current instruction; Under the condition that the instruction type of the current instruction is determined to be a non-aligned instruction, the current instruction is sent to a lower module to carry out a subsequent instruction processing flow; And under the condition that the instruction type of the current instruction is determined to be an alignment instruction, acquiring an instruction execution result of an preamble target associated instruction of the current instruction, and under the condition that the instruction execution results of the preamble target associated instruction of the current instruction are determined to be execution completion, executing an alignment instruction processing flow of the current instruction. According to another aspect of the present invention, there is provided a communication method applied to the communication apparatus of the first aspect, the method comprising: Receiving a current instruction and determining the instruction type of the current instruction; Under the condition that the instruction type of the current instruction is determined to be a non-aligned instruction, the current instruction is sent to a lower module to carry out a subsequent instruction processing flow; And under the condition that the instruction type of the current instruction is determined to be an alignment instruction, acquiring an instruction execution result of an preamble target associated instruction of the current instruction, and under the condition that the instruction execution results of the preamble target associated instruction of the current instruction are determined to be execution completion, executing an alignment instruction processing flow of the current instruction. According to another aspect of the present invention there is provided an electronic device comprising at least one processor comprising the communication apparatus of the first aspect. According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to execute a communication method according to any embodiment of the present invention. According to another aspect of the invention there is also provided a