CN-121996578-A - Storage system and data processing method

CN121996578ACN 121996578 ACN121996578 ACN 121996578ACN-121996578-A

Abstract

The application discloses a storage system and a data processing method, comprising a plurality of storage pages, wherein part of the storage pages are dynamically used for at least two storage slices, each storage slice is configured with a slice ID, one storage page in the storage slices is used for storing a head, the head of the storage slice comprises a slice ID field for indicating the slice ID of the storage slice and a write number field for indicating the write number, and the control system is connected with the plurality of storage pages and is used for managing the plurality of storage pages through the heads of the at least two storage slices and a mapping table between the plurality of storage pages and the at least two storage slices. Dynamic management of the storage pages is achieved.

Inventors

WU YONGCHAO

Assignees

合肥杰发科技有限公司

Dates

Publication Date: 20260508
Application Date: 20251205

Claims (15)

1. A storage system, comprising: A plurality of memory pages, a portion of the plurality of memory pages being dynamically used for at least two memory slices, each of the memory slices being configured with a slice ID, wherein one of the memory pages is used for storing a header, the header of the memory slice including a slice ID field for indicating the slice ID of the memory slice and a write number field for indicating a number of writes; And the control system is connected with the plurality of storage pages and is used for managing the plurality of storage pages through the heads of the at least two storage fragments and the mapping table between the plurality of storage pages and the at least two storage fragments.
2. The storage system of claim 1, wherein the control system performs an initialization procedure comprising: The control system extracts the fragment IDs of the at least two storage fragments from the heads of the at least two storage fragments; Creating the mapping table by using the fragment IDs of the at least two storage fragments, wherein the mapping table is represented by the fragment ID of each storage fragment and the page number of the corresponding storage page; In response to the fragment IDs of the at least two memory fragments being different from each other, the control system marks an initialization completion status.
3. The memory system of claim 2, wherein the plurality of memory pages are configured with a bit map, wherein the bit map comprises a plurality of bits, each bit being for indicating a respective memory page; the control system executes an initialization process, and further comprises: Setting the bit map to an original value; performing bit initialization for each of the memory pages; and responding to the completion of bit initialization of the plurality of memory pages, and obtaining the bit map as a target value.
4. The storage system of claim 3, wherein the head of the storage fragment further comprises: A magic number field for indicating the magic number identifying the validity of the header of the memory segment, and A version number field for indicating a software version number corresponding to the identified storage fragment, and A check value field, configured to indicate a check value for checking a header of the storage fragment, where the check value is calculated based on the magic number, the software version number, a fragment ID of the storage fragment, and a number of writes; For each of the memory pages, performing bit initialization, including: Reading the corresponding head of the storage fragment of the storage page in response to the existence of the corresponding head of the storage fragment of the storage page; setting a bit corresponding to the memory page in the bit map to a first value for indicating that the memory page is free in response to the magic number being invalid or the magic number being valid and the check value being not verified; and setting a bit corresponding to the storage page in the bit map to a second value for indicating that the storage page is occupied and recording the writing times in response to the magic number being valid and the check value passing the check.
5. The storage system of claim 2, wherein the control system performs an initialization procedure, further comprising: And in response to the existence of the same partition ID of the at least two storage partitions, the control system enters a power-down recovery mode to execute an exception handling flow on the storage partitions of the same partition ID.
6. The storage system of claim 5, wherein the write-times field in the header of one of the storage slices in the same slice ID is a first-time value and the write-times field in the header of another of the storage slices is a second-time value, wherein the second-time value is greater than the first-time value; and executing an exception processing flow on the storage fragments of the same fragment ID, wherein the exception processing flow comprises the following steps: and executing a migration processing flow on the storage fragments corresponding to the first numerical value, so that the storage fragments corresponding to the first numerical value are erased.
7. The memory system of claim 1, wherein the control system performs a write data flow comprising: Determining data to be written and addresses of the data to be written, and determining a target storage fragment corresponding to the data to be written and a fragment ID (identity) thereof based on the addresses of the data to be written; And in response to the existence of the head of the target storage slice, wherein the size of the remaining storage pages of the target storage slice is larger than or equal to the size of the data to be written, encrypting the data to be written by using a dynamic key, and writing the encrypted data to be written to the storage pages corresponding to the addresses in the target storage slice.
8. The memory system of claim 7, wherein the control system performs a write data flow, further comprising: Responding to the existence of the head of the target storage slice, wherein the size of the residual storage pages of the target storage slice is smaller than the size of the data to be written, and executing a migration processing flow on the target storage slice so as to release the storage pages in the target storage slice; encrypting the data to be written by using a dynamic key, and writing the encrypted data to be written to the storage page corresponding to the address in the target storage partition after the migration processing flow is executed.
9. The storage system of claim 7, wherein the control system determining that a header of the target storage segment exists comprises: determining the existence of the corresponding head according to the partition ID of the target storage partition; And in response to determining that the corresponding header does not exist in the mapping table according to the partition ID of the target storage partition, searching a free storage page from the plurality of storage pages, and creating the header of the target storage partition on the free storage page, so as to determine the header of the target storage partition, wherein the header of the target storage partition comprises a partition ID field for indicating the partition ID of the target storage partition and a write number field for indicating the current write number, and the current write number is the sum of the maximum write number corresponding to the plurality of storage pages and a preset value.
10. The storage system of claim 7 or 8, wherein the control system encrypts the data to be written using a dynamic key, comprising: generating the dynamic key based on the chip ID corresponding to the control system and the page number of the storage page to which the data to be written is written; and performing exclusive OR operation on the dynamic key and the data to be written to obtain the encrypted data to be written.
11. The storage system of claim 1, wherein the control system performs a migration process flow comprising: Determining target storage fragments to be migrated and heads thereof; Searching an idle storage page from the plurality of storage pages, and copying the head of the target storage partition to the idle storage page to obtain a head corresponding to the idle storage page, wherein the value of a write number field in the head corresponding to the idle storage page is replaced by the sum of the value of the write number field in the head of the target storage partition and a preset value; copying the storage data in the target storage fragments into the idle storage pages, and erasing the heads of the target storage fragments and the storage data in the target storage fragments.
12. The storage system of claim 11, wherein the control system copying storage data in the target storage shard into the free storage shard comprises: Decrypting the storage data by using a first dynamic key corresponding to the target storage partition to obtain decrypted storage data, wherein the first dynamic key is generated based on a chip ID corresponding to the control system and a page number of the storage page of the storage data in the target storage partition; encrypting the decrypted storage data by using a second dynamic key corresponding to the idle storage page to obtain data to be copied, wherein the second dynamic key is generated based on a chip ID corresponding to the control system and a page number of the idle storage page; Copying the data to be copied into the idle storage page.
13. The memory system of claim 1, wherein the control system to find a free memory page from the plurality of memory pages comprises: Responding to the maximum write times corresponding to the plurality of memory pages being 0, and sequentially searching from the plurality of memory pages to obtain the idle memory pages; And responding to the maximum writing times corresponding to the plurality of memory pages not being 0, and searching from the memory pages corresponding to the maximum data writing times to obtain the idle memory pages.
14. The storage system of claim 1, wherein the control system performs a read data flow comprising: Determining an address of data to be read; Determining at least two to-be-read memory fragments in the at least two memory fragments corresponding to the to-be-read data based on the address of the to-be-read data; Splitting the address of the data to be read into at least two sub-addresses, wherein the at least two sub-addresses correspond to the at least two memory fragments to be read, and each sub-address corresponds to one memory fragment to be read; reading the data of the sub address corresponding to each storage fragment to be read and placing the data in a buffer area; and responding to the completion of data buffering of the sub-address corresponding to each storage fragment to be read, and returning the data to be read.
15. A data processing method, applied to a storage system according to any one of claims 1 to 14, comprising: the control system processes data for the plurality of memory pages through the heads of the at least two memory slices and the mapping table between the plurality of memory pages and the at least two memory slices.

Description

Storage system and data processing method Technical Field The present application relates to the field of data storage technologies, and in particular, to a storage system and a data processing method. Background In the application scenarios of modern embedded systems, internet of things devices, vehicle-mounted electronic control units and the like, the systems often need a type of nonvolatile storage medium with power-off data retention capability and supporting a small number of frequent read-write operations. In the conventional scheme, an EEPROM (ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY, electrically erasable and programmable read only memory) is mostly adopted, the EEPROM is usually written and erased in units of bytes, and the erasing life is longer, but with the development of the integrated circuit manufacturing process, many micro controller chips gradually cancel the EEPROM unit, and the chip area and the manufacturing cost are reduced by adopting on-chip Flash to replace the function of the EEPROM unit. Flash is an eeprom with power-down data retention capability, and is commonly used for storing program code and parameter data, usually by erasing in units of blocks. The Flash simulation EEPROM mechanism is used for reading and writing data, so that the write amplification can be effectively reduced, but because the free space, the effective data and the waste data are difficult to be efficiently managed when the EEPROM is simulated, and the writing times and the erasing times of the Flash are limited, how to efficiently manage the data pages and improve the erasing life of the Flash is a problem to be solved. Disclosure of Invention In order to solve the above problems, the present application at least provides a storage system and a data processing method, which implement dynamic management of data pages of the storage system and improve the service life. In a first aspect, the application provides a storage system comprising a plurality of storage pages, part of the storage pages of the plurality of storage pages being dynamically used for at least two storage slices, each of the storage slices being configured with a slice ID, wherein one of the storage pages is used for storing a head, the head of the storage slice comprises a slice ID field for indicating the slice ID of the storage slice and a write number field for indicating the write number, and a control system connected with the plurality of storage pages and used for managing the plurality of storage pages through the heads of the at least two storage slices and a mapping table between the plurality of storage pages and the at least two storage slices. In some embodiments, the control system performs an initialization procedure including the control system extracting the shard IDs of the at least two memory shards from the headers of the at least two memory shards, creating the mapping table using the shard IDs of the at least two memory shards, wherein the mapping table is represented by the shard ID of each memory shard and the page number of the corresponding memory page, and in response to the shard IDs of the at least two memory shards being different from each other, marking an initialization completion status by the control system. In some embodiments the plurality of memory pages are configured with a bit map, wherein the bit map comprises a plurality of bits, each bit being used to indicate a corresponding one of the memory pages, the control system performing an initialization procedure further comprising setting the bit map to an original value, performing bit initialization for each of the memory pages, and obtaining the bit map as a target value in response to completion of bit initialization for the plurality of memory pages. In some embodiments, the memory slice header further includes a magic number field for indicating a magic number identifying the validity of the memory slice header, and a version number field for indicating a software version number corresponding to the memory slice, and a check value field for indicating a check value for checking the memory slice header, wherein the check value is calculated based on the magic number, the software version number, a slice ID of the memory slice, and a number of writes, for each of the memory pages, performing bit initialization including, in response to the memory page having a corresponding memory slice header, reading the memory slice header corresponding to the memory page, in response to the memory page having no valid magic number, or the magic number is valid and the check value is not passed, setting a bit corresponding to the memory page in the bit map to a first value for indicating that the memory page is free, in response to the magic number being valid and the check value is passed, setting a bit corresponding to the memory page to a second value for indicating that the memory page has been occupied. In some embodiments, the control system