CN-121997387-A - Processing method, logic control unit and electronic equipment

Abstract

The application discloses a processing method, a logic control unit and electronic equipment, wherein the processing method comprises the steps of detecting state information of a security chip, wherein the state information at least represents whether the security chip is in an in-place state or not, the security chip is used for performing access protection on a target memory, when the state information represents that the security chip is in the in-place state, a first access path is used as a target access path, the first access path comprises the security chip, when the state information represents that the security chip is in an out-of-place state, a second access path is used as the target access path, the second access path does not comprise the security chip, the target access path is used for transmitting signals of a main control unit in a main control board of a system to the target memory, data source information of the first access path and data source information of the second access path are identical, and output final destinations are identical.

Inventors

• LI CONG
• ZHANG ZHIAN

Assignees

• 联想(北京)有限公司

Dates

Publication Date

20260508

Application Date

20260127

Claims (10)

1. 1. A method of processing, comprising: Detecting state information of a security chip, wherein the state information at least represents whether the security chip is in an in-place state or not; When the state information characterizes that the security chip is in an in-place state, a first access path is used as a target access path, and the first access path comprises the security chip; when the state information characterizes that the security chip is in an out-of-bit state, a second access path is used as a target access path, and the second access path does not contain the security chip; the target access path is used for transmitting signals of a main control unit in a main control board of the system to the target memory, the data source information of the first access path and the data source information of the second access path are the same, and the output final destination is the same.
2. 2. The processing method according to claim 1, using the first access path as the target access path in a case where the state information characterizes that the secure chip is in an in-bit state, comprising: Splitting the signal of the main control unit into a first path of signal and a second path of signal when the state information characterizes that the security chip is in an in-place state, wherein the first path of signal is transmitted through a first access path; Selecting the first path of signals from the first path of signals and the second path of signals as output, and transmitting the first path of signals to the target memory; Using a second access path as a target access path when the state information characterizes the secure chip as being in an out-of-bit state, comprising: Splitting the signal of the main control unit into the first path of signal and the second path of signal when the state information characterizes that the security chip is in an out-of-place state; and selecting the second path of signals from the first path of signals and the second path of signals as output, and transmitting the second path of signals to the target memory.
3. 3. The processing method according to claim 1, if the main control unit includes a plurality of, using the first access path as the target access path in a case where the state information characterizes that the secure chip is in an in-bit state, comprising: and when the state information characterizes that the security chip is in an in-place state, respectively taking the first access paths corresponding to the master control units as target access paths of the master control units.
4. 4. The processing method according to claim 1, the detecting status information of the security chip, comprising: The method comprises the steps of detecting level signals of at least two target interfaces of a security chip, determining a level combination formed by the level signals of the at least two target interfaces as state information of the security chip, wherein the at least two target interfaces are pre-configured on the security chip to present a specified level combination so as to uniquely characterize the in-place state of the security chip and/or the type of the security chip.
5. 5. The processing method according to claim 4, the processing method further comprising: Identifying a type of the security chip based on the level combination; And sending the type of the security chip to a main control unit so that the main control unit loads a target driver based on the type of the security chip, wherein the target driver is used for realizing communication between the main control unit and the security chip.
6. 6. A logic control unit, comprising: The system comprises a state detection circuit, a target memory, a state detection circuit and a memory, wherein the state detection circuit is used for detecting state information of a security chip, and the state information at least represents whether the security chip is in an in-place state or not; Control logic circuitry to: When the state information characterizes that the security chip is in an in-place state, a first access path is used as a target access path, and the first access path comprises the security chip; when the state information characterizes that the security chip is in an out-of-bit state, a second access path is used as a target access path, and the second access path does not contain the security chip; the target access path is used for transmitting signals of a main control unit in a main control board of the system to the target memory, the data source information of the first access path and the data source information of the second access path are the same, and the output final destination is the same.
7. 7. An electronic device, comprising: At least one master control unit; at least one target memory; The signal selection logic component group comprises a first signal selection logic component and a second signal selection logic component, wherein a first signal output interface of the first signal selection logic component is connected with a first signal input interface of the second signal selection logic component through a safety chip; the security chip is used for performing access protection on the target memory; The logic control unit is used for detecting the state information of the security chip, and outputting a first control signal to the first signal selection logic component and the second signal selection logic component when the state information represents that the security chip is in an in-place state; The first signal selection logic component is used for splitting the signal of the main control unit into a first path of signal and a second path of signal based on the first control signal or the second control signal; The second signal selection logic unit is configured to select, based on the first control signal, the first path signal from the first path signal and the second path signal as output, and transmit the first path signal to the target memory, or select, based on the second control signal, the second path signal from the first path signal and the second path signal as output, and transmit the second path signal to the target memory.
8. 8. The electronic device of claim 7, wherein the set of signal selection logic further comprises a third signal selection logic if the target memory support is accessed by a plurality of master units; And the third signal selection logic component is used for selecting one signal from the signals output by the main control units and sending the signal to the first signal selection logic component.
9. 9. The electronic device according to claim 7, wherein the logic control unit is connected with at least two target interfaces of the security chip, and is used for detecting level signals of the at least two target interfaces of the security chip, determining a level combination formed by the level signals of the at least two target interfaces as state information of the security chip, and the at least two target interfaces are configured on the security chip in advance to present a specified level combination so as to uniquely represent the in-place state of the security chip and/or the type of the security chip.
10. 10. The electronic device of claim 7, the electronic device further comprising: the system main control board comprises at least one main control unit, at least one target memory and a signal selection logic component group corresponding to the target memory; the safety chip is detachably connected with the system main control board.

Description

Processing method, logic control unit and electronic equipment Technical Field The present application relates to the field of computer technologies, and in particular, to a processing method, a logic control unit, and an electronic device. Background Currently, PFR (Platform firmware) technology mainly designs a special PFR chip on an SPI (SERIAL PERIPHERAL INTERFACE) link to protect Flash Memory in an electronic device. However, not all customers need PFR functions, so circuit boards often need to be manufactured separately for the case of PFR functions, reducing the flexibility of adaptation of the electronic device. Disclosure of Invention The technical scheme provided by the application is as follows: The first aspect of the application provides a processing method, comprising: Detecting state information of a security chip, wherein the state information at least represents whether the security chip is in an in-place state or not; When the state information characterizes that the security chip is in an in-place state, a first access path is used as a target access path, and the first access path comprises the security chip; when the state information characterizes that the security chip is in an out-of-bit state, a second access path is used as a target access path, and the second access path does not contain the security chip; the target access path is used for transmitting signals of a main control unit in a main control board of the system to the target memory, the data source information of the first access path and the data source information of the second access path are the same, and the output final destination is the same. In one possible implementation, when the state information characterizes that the secure chip is in an in-bit state, using the first access path as the target access path includes: Splitting the signal of the main control unit into a first path of signal and a second path of signal when the state information characterizes that the security chip is in an in-place state, wherein the first path of signal is transmitted through a first access path; Selecting the first path of signals from the first path of signals and the second path of signals as output, and transmitting the first path of signals to the target memory; Using a second access path as a target access path when the state information characterizes the secure chip as being in an out-of-bit state, comprising: Splitting the signal of the main control unit into the first path of signal and the second path of signal when the state information characterizes that the security chip is in an out-of-place state; and selecting the second path of signals from the first path of signals and the second path of signals as output, and transmitting the second path of signals to the target memory. In one possible implementation, if the master unit includes a plurality of, using a first access path as a target access path when the state information characterizes that the secure chip is in an in-bit state, comprising: and when the state information characterizes that the security chip is in an in-place state, respectively taking the first access paths corresponding to the master control units as target access paths of the master control units. In one possible implementation, the detecting the status information of the security chip includes: The method comprises the steps of detecting level signals of at least two target interfaces of a security chip, determining a level combination formed by the level signals of the at least two target interfaces as state information of the security chip, wherein the at least two target interfaces are pre-configured on the security chip to present a specified level combination so as to uniquely characterize the in-place state of the security chip and/or the type of the security chip. In one possible implementation, the processing method further includes: Identifying a type of the security chip based on the level combination; And sending the type of the security chip to a main control unit so that the main control unit loads a target driver based on the type of the security chip, wherein the target driver is used for realizing communication between the main control unit and the security chip. In another aspect of the present application, there is provided a logic control unit comprising: The system comprises a state detection circuit, a target memory, a state detection circuit and a memory, wherein the state detection circuit is used for detecting state information of a security chip, and the state information at least represents whether the security chip is in an in-place state or not; Control logic circuitry to: When the state information characterizes that the security chip is in an in-place state, a first access path is used as a target access path, and the first access path comprises the security chip; when the state information characterizes that the security chip is in an out-of-bit state, a secon