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CN-121997861-A - Processor verification platform, method, electronic device and storage medium

CN121997861ACN 121997861 ACN121997861 ACN 121997861ACN-121997861-A

Abstract

The application provides a processor verification platform, a processor verification method, electronic equipment and a storage medium. The processor verification platform is used for being deployed on electronic equipment and comprises a virtual hardware environment module, a test control system module and an execution engine, wherein the virtual hardware environment module comprises a model library, the model library comprises a plurality of software models, the test control system module is used for receiving environment configuration instructions and configuration files, the test control system module controls the virtual hardware environment module to call a target software model corresponding to the preset hardware from the model library and run according to the environment configuration instructions to form a verification environment, and the execution engine is used for performing data interaction with the target software model according to the test instructions under the verification environment so as to simulate data interaction between firmware of the processor to be verified and hardware managed by the processor. The processor verification platform is beneficial to improving the verification efficiency and effect of the processor firmware before streaming and reducing the verification cost.

Inventors

  • FU ZHENQIU

Assignees

  • 上海天数智芯半导体股份有限公司

Dates

Publication Date
20260508
Application Date
20251229

Claims (13)

  1. 1. A processor verification platform for deployment on an electronic device, the processor verification platform comprising: The virtual hardware environment module comprises a model library, wherein the model library comprises a plurality of software models, and functions defined by different software models are matched with functions of all hardware managed by the processor firmware; The system comprises a test control system module, a test control system module and a test control system module, wherein the test control system module is used for receiving an environment configuration instruction and a configuration file, the environment configuration instruction is used for indicating each preset hardware managed by the firmware of a processor to be verified, and the configuration file comprises a test instruction for the firmware of the processor to be verified; The test control system module is further used for controlling the virtual hardware environment module to call a target software model corresponding to the preset hardware from the model library and run according to the environment configuration instruction to form a verification environment; the execution engine is used for acquiring the configuration file from the test control system module; the execution engine is further used for performing data interaction with the target software model according to the test instruction under the verification environment so as to simulate data interaction between the firmware of the processor to be verified and the hardware managed by the processor to be verified.
  2. 2. The processor verification platform according to claim 1, wherein data is transmitted between the execution engine and each software model in the virtual hardware environment module based on a preset system bus; The processor verification platform further comprises: The fault injection engine module is used for receiving a fault injection instruction, wherein the fault injection instruction is used for indicating the target software model to feed back first abnormal data; The fault injection engine module is further configured to monitor the system bus, and modify feedback data according to the fault injection instruction, so as to configure the first abnormal data in the feedback data, where the feedback data is data fed back to the execution engine by the target software model through the system bus.
  3. 3. The processor verification platform of claim 2, wherein the fault injection instruction includes at least one of exception data of a memory error, an interrupt error, and a clock error.
  4. 4. The processor verification platform of claim 2, wherein the test control system module is further configured to receive a fault simulation rule, the fault simulation rule comprising a rule that the target software model is preset to feed back second exception data to the execution engine; the test control system module is further configured to configure the fault simulation rule for the fault injection engine module; the fault injection engine module is further configured to monitor the system bus and modify the feedback data based on the fault simulation rules.
  5. 5. The processor verification platform of claim 2, further comprising an intelligent management engine module; The intelligent management engine module comprises a perception sub-module, a decision sub-module and an execution sub-module; The sensing sub-module is used for monitoring data sent by the execution engine in the system bus to obtain firmware behaviors; the decision sub-module is used for analyzing abnormal behaviors in the firmware behaviors to obtain an abnormal analysis result; and the execution submodule is used for generating a directional test case according to the abnormal analysis result.
  6. 6. The processor verification platform of claim 1, wherein the processor verification platform further comprises a time travel debugging system; The time travel debugging system is used for recording the state of the processor verification platform based on a preset recording rule to obtain a time recording result, wherein the time recording result comprises a global state and a corresponding time stamp, and the global state comprises the working state of each module in the processor verification platform.
  7. 7. The processor verification platform of claim 6, wherein the time travel debugging system is further configured to receive a rollback instruction, the rollback instruction comprising a target timestamp; and the time travel debugging system is also used for controlling the processor verification platform to recover to the global state corresponding to the target timestamp according to the time record result and the target timestamp.
  8. 8. The processor verification platform of any one of claims 1-7, wherein the software model comprises an interconnection model for interfacing with other interconnection models; the configuration instruction further comprises the number of the processors to be verified, and the test control system module is further used for configuring processor virtual instances with the number matched with the number of the processors to be verified and controlling each processor virtual instance to be interconnected based on the interconnection model.
  9. 9. The processor verification platform of any one of claims 1-7, wherein the software model comprises a virtual Flash; the test control system module is also used for configuring the address of the virtual Flash as the hardware address of the Flash in the processor to be verified; after the test control system module calls the virtual Flash, the test control system module is further configured to store the configuration file into the virtual Flash; the execution engine comprises a virtual DMA and a virtual RAM; the address of the virtual DMA is used for being configured as the hardware address of the DMA in the processor to be verified, and the virtual RAM is used for being configured as the hardware address of the RAM in the processor to be verified; The execution engine is also used for obtaining the configuration file from the virtual Flash through the virtual DMA and storing the configuration file into the virtual RAM.
  10. 10. The processor verification platform of any one of claims 1-7, wherein the software model is a model written based on C language or c++.
  11. 11. A processor verification method, characterized by being deployed on an electronic device; the processor verification method comprises the following steps: The method comprises the steps of receiving environment configuration instructions and configuration files, wherein the environment configuration instructions are used for indicating all preset hardware managed by firmware of a processor to be verified, and the configuration files comprise test instructions for the firmware of the processor to be verified; According to the environment configuration instruction, controlling a target software model corresponding to the preset hardware to be called from a preset model library and run to form a verification environment, wherein the model library comprises a plurality of software models, and functions defined by different software models are matched with functions of all hardware managed by a processor firmware; and under the verification environment, performing data interaction with the target software model according to the test instruction so as to simulate the data interaction between the firmware of the processor to be verified and the hardware managed by the processor to be verified.
  12. 12. An electronic device comprising a memory and a processor, the memory having stored therein computer readable instructions that, when executed by the processor, cause the processor to perform the functions of the processor verification platform of any one of claims 1-10.
  13. 13. A computer readable storage medium, characterized in that the computer program is stored in the readable storage medium, which when run on a computer causes the computer to implement the functionality of the processor verification platform of any one of claims 1-10.

Description

Processor verification platform, method, electronic device and storage medium Technical Field The application relates to the field of integrated circuit design, and particularly provides a processor verification platform, a processor verification method, electronic equipment and a storage medium. Background The processor firmware is used for managing software of various hardware resources such as a processor chip, a card connected with the processor chip, a connected peripheral and the like, and the functions of the firmware comprise the management of the starting, the power consumption, the memory, the data interaction, the thermal management, the error recovery and the like of the processor chip. In validating the firmware functions of a processor, various validation tools are typically used, such as RLT (Register-TRANSFER LEVEL, register transfer level) emulators, FPGA (Field Programmable GATE ARRAY ) prototypes, universal instruction emulation sets, and the like. However, when the FPGA prototype verification is performed, it is usually required to perform verification by combining with hardware, and before the processor chip is not streamed, the corresponding processor chip is not available to perform verification by matching with a board card, a peripheral device, etc. The verification of the processor firmware mainly comprises verification of functions, data interaction and the like of the firmware, the verification is mainly performed on a workflow, the granularity of verification is small when the RLT simulator performs chip verification, and the verification is small when the RLT simulator performs chip verification, so that unnecessary verification processes are introduced when the processor firmware is verified, and the verification efficiency is low and the time consumption is long. The general instruction simulation set is a CPU simulation and general simulation peripheral model, which lacks part of functions required in a firmware verification stage, for example, lacks part of functions of the processor firmware, and cannot verify the processor firmware, so that verification requirements of monitoring, assertion inspection, result comparison and the like cannot be met. Thus, there is a need for an authentication method and platform suitable for authenticating processor firmware prior to streaming the processor chips. Disclosure of Invention In view of the foregoing, the present application is directed to a processor verification platform, a method, an electronic device, and a storage medium, so as to improve the efficiency and the verification effect of verifying the processor firmware before streaming, and assist a developer in effectively debugging and modifying the processor firmware before streaming. In a first aspect, an embodiment of the present application provides a processor verification platform, configured to be deployed on an electronic device, where the processor verification platform includes a virtual hardware environment module, including a model library, where the model library includes a plurality of software models, different functions defined by the software models are matched with functions of hardware managed by a processor firmware, a test control system module configured to receive an environment configuration instruction and a configuration file, where the environment configuration instruction is used to instruct each preset hardware managed by the firmware of the processor to be verified, the configuration file is a configuration file of the firmware of the processor to be verified and includes a test instruction for the firmware of the processor to be verified, and the test control system module is further configured to control the virtual hardware environment module to call a target software model corresponding to the preset hardware from the model library and run according to the environment configuration instruction to form a verification environment, and an execution engine configured to obtain the configuration file from the test control system module, where the execution engine is further configured to perform data interaction with the target software model according to the test instruction under the verification environment so as to simulate interaction between the firmware to be verified and the respective managed hardware. In the embodiment of the application, the platform is realized as a software platform which is deployed on the electronic equipment, the function of the processor firmware capable of managing hardware is abstracted and defined as a software model, various functional modules, board card devices, external equipment and other hardware on the board card can be managed by simulating the processor firmware in a software program mode, and the corresponding software model is selected to run according to the requirements of the processor to be verified, so that a verification environment matched with the processor to be verified is formed. Then, th