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CN-121997862-A - Chip driving parameter configuration method and chip driving parameter configuration device

CN121997862ACN 121997862 ACN121997862 ACN 121997862ACN-121997862-A

Abstract

The application relates to the technical field of chips, and provides a chip driving parameter configuration method and a chip driving parameter configuration device, which can determine initial time sequence parameters and initial electrical parameters of target chips for driving external equipment to be driven from a preset association relation based on working state information of the external equipment to be driven, then determine total time delay amount according to physical topology information between the external equipment to be driven and the target chips, adjust the initial time sequence parameters based on the total time delay amount, and adjust the initial electrical parameters based on electrical constraint information of the external equipment to be driven so as to drive the external equipment to be driven based on the adjusted parameters, thereby avoiding the problem of long time consumption of manual configuration, improving the efficiency of chip driving parameter configuration, enabling the adjusted parameters to be more fit with the current actual deployment scene by adjusting the target initial parameters based on the physical topology information and the electrical constraint information, and improving the accuracy and the suitability of chip driving parameter configuration.

Inventors

  • SHEN YU

Assignees

  • 爱芯元智半导体股份有限公司

Dates

Publication Date
20260508
Application Date
20260409

Claims (10)

  1. 1. A chip driving parameter configuration method, wherein a target chip is communicatively connected with an external device to be driven, the method comprising: Acquiring the working state information of the external equipment to be driven; Determining a target initial parameter corresponding to the working state information of the external equipment to be driven according to a preset association relation, wherein the target initial parameter comprises an initial time sequence parameter and an initial electrical parameter of the target chip for driving the external equipment to be driven, and the association relation is an association relation between the working state information of the external equipment and the initial parameter; Determining the total delay according to the physical topology information between the external equipment to be driven and the target chip; Based on the total time delay, adjusting the initial time sequence parameter to obtain a target time sequence parameter; According to the electrical constraint information of the external equipment to be driven, the initial electrical parameters are adjusted to obtain target electrical parameters, and the electrical constraint information is used for representing electrical working limiting conditions of the external equipment to be driven; And configuring parameters of the target chip for driving the external equipment to be driven based on the target time sequence parameters and the target electrical parameters.
  2. 2. The method of claim 1, wherein determining the total amount of delay based on physical topology information between the external device to be driven and the target chip comprises: determining the hierarchical depth of the external equipment to be driven according to the physical topology information between the external equipment to be driven and the target chip, wherein the hierarchical depth is used for representing the number of equipment on a signal transmission path between the external equipment to be driven and the target chip; determining the total level delay according to the level depth and the preset unit level delay; And determining the sum of the total level delay amount and the inherent delay amount as the total delay amount.
  3. 3. The method of claim 1, wherein adjusting the initial timing parameter based on the total amount of time delay to obtain a target timing parameter comprises: performing quantization processing on the total delay amount to generate a delay compensation vector; and according to the time delay compensation vector, performing superposition correction on the initial time sequence parameter to obtain the target time sequence parameter.
  4. 4. The method of claim 3, wherein the initial timing parameters include an initial clock offset, an initial signal setup time, and an initial signal hold time for the target chip to drive the external device to be driven, the delay compensation vector including a delay compensation vector corresponding to the initial clock offset, a delay compensation vector corresponding to the initial signal setup time, and a delay compensation vector corresponding to the initial signal hold time; and carrying out quantization processing on the total delay amount to generate a delay compensation vector, wherein the method comprises the following steps of: Determining a proportionality coefficient of the total delay amount to the reference clock period of the target chip; determining a delay compensation vector corresponding to the initial clock offset according to the proportionality coefficient and the clock phase subdivision bit number of the target chip, wherein the clock phase subdivision bit number is used for representing the fine degree of the target chip time sequence adjustment; Taking the product of a preset first compensation coefficient and the total delay amount as a delay compensation vector corresponding to the initial signal establishing time; and taking the product of a preset second compensation coefficient and the total delay amount as a delay compensation vector corresponding to the initial signal holding time.
  5. 5. The method of claim 1, wherein the initial electrical parameter comprises an initial voltage at which the target chip drives the external device to be driven, and the electrical constraint information comprises a voltage constraint interval of the external device to be driven; According to the electrical constraint information of the external equipment to be driven, the initial electrical parameters are adjusted to obtain target electrical parameters, and the method comprises the following steps: determining an adjustment step length according to the voltage constraint interval of the external equipment to be driven; And adjusting the initial voltage to a section intermediate value of the voltage constraint section according to the adjustment step length, and taking the intermediate value as the target electrical parameter.
  6. 6. The method of claim 1, wherein the initial electrical parameters include an initial driving current and an initial signal slew rate of the target chip driving the external device to be driven, and the electrical constraint information includes a driving capability upper limit value of an interface between the external device to be driven and the target chip; According to the electrical constraint information of the external equipment to be driven, the initial electrical parameters are adjusted to obtain target electrical parameters, and the method comprises the following steps: Determining a target grade corresponding to the driving capability upper limit value according to a preset grade association relation, and determining a driving current interval corresponding to the target grade and a signal slew rate interval corresponding to the target grade; Adjusting the initial driving current to the middle value of the driving current interval, and taking the middle value of the driving current interval as the target electrical parameter; And adjusting the initial signal slew rate to the middle value of the signal slew rate section, and taking the middle value of the signal slew rate section as the target electrical parameter.
  7. 7. The method of claim 1, wherein configuring parameters of the target chip to drive the external device to be driven based on the target timing parameters and the target electrical parameters comprises: Pre-configuring parameters of the target chip for driving the external equipment to be driven according to the target time sequence parameters and the target electrical parameters; starting the external equipment to be driven to perform self-checking; Acquiring an equipment operation state signal and a communication performance signal; Determining a first evaluation value corresponding to the running state signal and a second evaluation value corresponding to the communication performance signal according to a preset evaluation strategy; performing weighted summation operation on the first evaluation value and the second evaluation value to obtain a comprehensive evaluation value; And under the condition that the comprehensive evaluation value is not smaller than a preset threshold value, configuring the target time sequence parameter and the target electrical parameter as parameters of the target chip for driving the external equipment to be driven.
  8. 8. The method of claim 7, wherein the method further comprises: and under the condition that the comprehensive evaluation value is not smaller than a preset threshold value, replacing the initial time sequence parameter of the external equipment to be driven in the association relation with the target time sequence parameter, replacing the initial electrical parameter of the external equipment to be driven in the association relation with the target electrical parameter, and constructing the association relation between the working state information of the external equipment to be driven, the physical topology information and the electrical constraint information in the association relation.
  9. 9. A chip driving parameter configuration apparatus, wherein a target chip is communicatively connected to an external device to be driven, the apparatus comprising: The acquisition module is used for acquiring the working state information of the external equipment to be driven; the determining module is used for determining target initial parameters corresponding to the working state information of the external equipment to be driven according to a preset association relationship, wherein the target initial parameters comprise initial time sequence parameters and initial electrical parameters of the target chip for driving the external equipment to be driven, and the association relationship is between the working state information of the external equipment and the initial parameters; the determining module is further used for determining the total delay according to the physical topology information between the external equipment to be driven and the target chip; The adjusting module is used for adjusting the initial time sequence parameter based on the total time delay amount to obtain a target time sequence parameter; The adjusting module is further used for adjusting the initial electrical parameters according to the electrical constraint information of the external equipment to be driven to obtain target electrical parameters, wherein the electrical constraint information is used for representing electrical work limiting conditions of the external equipment to be driven; And the configuration module is used for configuring the parameters of the target chip for driving the external equipment to be driven based on the target time sequence parameters and the target electrical parameters.
  10. 10. A computer device comprising a processor and a memory for storing at least one program loaded by the processor and executing the chip drive parameter configuration method according to any one of claims 1 to 8.

Description

Chip driving parameter configuration method and chip driving parameter configuration device Technical Field The present application relates to the field of chip technologies, and in particular, to a method and an apparatus for configuring chip driving parameters. Background As the application scene of the chip becomes more complex, the cooperative deployment of various external devices (such as sensors, memories, etc.) and the chip becomes wider. At present, a technician usually analyzes related documents of external equipment manually, and cards physical connection relation between a chip and the external equipment to realize configuration of chip driving parameters, so that the chip can drive the external equipment according to the configured parameters, and normal communication between the chip and the external equipment is realized. However, when the manual mode is adopted to perform the chip driving parameter configuration, the configuration efficiency is low and the driving parameter configuration accuracy is difficult to ensure due to the various types of external devices and the complex physical connection relationship. Disclosure of Invention The embodiment of the application provides a chip driving parameter configuration method and a chip driving parameter configuration device, which can improve the efficiency and the accuracy of chip driving parameter configuration. According to a first aspect of an embodiment of the present application, there is provided a method for configuring driving parameters of a chip, where a target chip is communicatively connected to an external device to be driven, including: acquiring working state information of external equipment to be driven; Determining target initial parameters corresponding to the working state information of the external equipment to be driven according to a preset association relation, wherein the target initial parameters comprise initial time sequence parameters and initial electrical parameters of the external equipment to be driven by a target chip, and the association relation is the association relation between the working state information of the external equipment and the initial parameters; determining the total delay according to the physical topology information between the external equipment to be driven and the target chip; Based on the total time delay, adjusting an initial time sequence parameter to obtain a target time sequence parameter; according to the electrical constraint information of the external equipment to be driven, the initial electrical parameters are adjusted to obtain target electrical parameters, and the electrical constraint information is used for representing the electrical work limiting conditions of the external equipment to be driven; and configuring parameters of the target chip for driving the external equipment to be driven based on the target time sequence parameters and the target electrical parameters. In some embodiments of the present application, determining the total delay amount according to physical topology information between the external device to be driven and the target chip includes: Determining the hierarchical depth of the external equipment to be driven according to the physical topology information between the external equipment to be driven and the target chip, wherein the hierarchical depth is used for representing the number of equipment on a signal transmission path between the external equipment to be driven and the target chip; determining the total level delay according to the level depth and the preset unit level delay; the sum of the total level delay amount and the inherent delay amount is determined as the total delay amount. In some embodiments of the present application, adjusting the initial timing parameter based on the total amount of delay to obtain the target timing parameter includes: carrying out quantization processing on the total delay amount to generate a delay compensation vector; And according to the time delay compensation vector, performing superposition correction on the initial time sequence parameter to obtain the target time sequence parameter. In some embodiments of the present application, the initial timing parameters include an initial clock offset, an initial signal setup time, and an initial signal hold time for the target chip to drive the external device to be driven, and the delay compensation vector includes a delay compensation vector corresponding to the initial clock offset, a delay compensation vector corresponding to the initial signal setup time, and a delay compensation vector corresponding to the initial signal hold time; The method comprises the steps of carrying out quantization processing on the total delay amount to generate a delay compensation vector, and comprising the following steps: determining a proportionality coefficient of the total delay amount to the reference clock period of the target chip; Determining a time delay