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CN-121997864-A - Modeling method for temperature characteristics of power SiC D-MOSFET semiconductor device

CN121997864ACN 121997864 ACN121997864 ACN 121997864ACN-121997864-A

Abstract

The invention relates to a temperature characteristic modeling method of a power SiC D-MOSFET semiconductor device, which belongs to the field of power electronic device modeling, and is based on a BSIM3HV parallel reverse PNJDiode device model and used for the simulation of the wide temperature range characteristic of the power semiconductor device, and comprises the steps of (1) extracting the static current characteristic of the power device through actual measurement or a specification manual; the method comprises the steps of (1) defining the geometric structure and key technological characteristic parameters of a power SiC D-MOSFET device, (3) defining the equivalent circuit topology of the SiC D-MOSFET device, (4) extracting the relevant static electrical characteristics of the processing temperature by using TCAD, carrying out parameter optimization fitting verification on a known SPICE model, and (5) establishing a complete SiC D-MOSFET model by combining other technological parameters with default values. The modeling method can accurately reflect the electrical performance of the power semiconductor device, overcomes the time delay between the simulation of the semiconductor device and the semiconductor process, and provides a reliable research foundation for the circuit design and the technology development based on the power semiconductor device under different temperature conditions.

Inventors

  • CHENG HE
  • YANG ZHIJIA
  • ZHANG ZHIPENG
  • ZHANG CHAO
  • XIE CHUANG

Assignees

  • 中国科学院沈阳自动化研究所

Dates

Publication Date
20260508
Application Date
20241107

Claims (8)

  1. 1. The modeling method for the temperature characteristics of the power SiC D-MOSFET semiconductor device is characterized by comprising the following steps of: 1) Static electric characteristic parameters of the power SiC D-MOSFET semiconductor device under different temperature conditions are obtained through actual device measurement; 2) Acquiring key parameters of the geometric structure and the process characteristics of a known power SiC D-MOSFET semiconductor device; 3) Based on the geometric structure of the power SiC D-MOSFET semiconductor device, the power SiC D-MOSFET semiconductor device is equivalent to a parallel topology sub-circuit formed by a plurality of equivalent sub-devices with the same electrical characteristics and geometric structure; 4) Extracting temperature-related static electrical characteristics of the power SiC D-MOSFET semiconductor sub-device by using TCAD, and comparing the temperature-related static electrical characteristics with the measured static electrical characteristics to generate intermediate data for describing the characteristics of the wide-temperature-range static current; 5) Comparing the known SPICE model with intermediate data based on the circuit topology structure of the sub-device, performing parameter optimization fitting verification based on the SPICE model, and extracting key characteristic parameters of the sub-device model after parameter optimization; 6) And (3) establishing a complete power SiC D-MOSFET semiconductor device whole set model according to the plurality of parameters obtained in the step (1) to the step (5).
  2. 2. The method for modeling the temperature characteristics of the power SiC D-MOSFET semiconductor device according to claim 1, wherein the step 3) specifically comprises: The power SiC D-MOSFET semiconductor device is equivalent to a plurality of equivalent semiconductor sub-devices which are connected in parallel and have the same structure and the same process condition, and the length and width of the channel are reduced according to the equivalent number proportion.
  3. 3. The modeling method for temperature characteristics of a power SiC D-MOSFET semiconductor device according to claim 2, wherein the number of equivalent semiconductor sub-devices is m Where L eq is the gate length of the preferred equivalent parallel sub-device, L m is the gate length of the overall device, W eq is the gate width of the preferred equivalent parallel sub-device, and W m is the gate width of the overall device.
  4. 4. The method for modeling the temperature characteristics of the power SiC D-MOSFET semiconductor device according to claim 1, wherein the step 4) specifically includes: the geometric structure and the technological parameters of the device are extracted and determined through a TCAD numerical simulation model, and the simulation calculation result of the static current characteristic is close to the result obtained by measurement through optimizing and fitting the technological parameters.
  5. 5. The method for modeling temperature characteristics of a power SiC D-MOSFET semiconductor device according to claim 4, wherein a simulation calculation result describing a quiescent current characteristic of a TCAD numerical simulation model is used as intermediate data, and stored in a form of a fixed data format file, and is made to satisfy an input file data format requirement of a subsequent TCAD-based SPICE model extraction module.
  6. 6. The method for modeling the temperature characteristics of the power SiC D-MOSFET semiconductor device according to claim 1, wherein the step 5) specifically comprises: Comparing the TCAD with the result of SPICE model calculation to obtain the gate length L eq and the width W eq of the optimal equivalent parallel sub-device, under the framework of the SPICE model based on BSIM3HV, performing fitting operation by taking the intermediate data obtained by the TCAD as the reference current characteristic, further performing optimal and reverse optimization operation on each parameter in the SPICE model, and finally obtaining the BSIM3HV SPICE model.
  7. 7. The method for modeling temperature characteristics of a power SiC D-MOSFET semiconductor device according to claim 6, wherein the effective channel length L eff of the equivalent semiconductor sub-device and the effective channel width W eff of the gate of the equivalent parallel sub-device are respectively: Wherein L eq is the gate length of the preferred equivalent parallel sub-device, W eq is the gate width of the preferred equivalent parallel sub-device, L INT is the channel length offset fitting parameter, L L is the channel length correlation coefficient of the channel length offset, L W is the channel width correlation coefficient of the channel length offset, L WL is the length-width crossover term coefficient of the channel length offset, L LN is the channel length correlation power of the channel length offset, L WN is the channel width correlation power of the channel length offset, W INT is the channel width offset fitting parameter, W L is the channel length correlation coefficient of the channel width offset, W W is the channel width correlation coefficient of the channel width offset, W WL is the length-width crossover term coefficient of the channel width offset, W LN is the channel length correlation power of the channel width offset, and W WN is the channel width correlation power of the channel width offset.
  8. 8. The method for modeling the temperature characteristics of the power SiC D-MOSFET semiconductor device according to claim 1, wherein the step 6) specifically includes: And selecting SPICE sub-device models based on a power SiCD-MOSFET semiconductor device intensive model BSIM3HV parallel reverse PN junction DIODE device intensive model PNJDoide by combining structure topology, performing comparison fitting algorithm verification, extracting key process library parameters of BSIM3HV and PNJDoide device models, further finishing accuracy verification of the extracted parameters, and obtaining a complete power SiCD-MOSFET semiconductor device model.

Description

Modeling method for temperature characteristics of power SiC D-MOSFET semiconductor device Technical Field The invention belongs to the field of modeling of power electronic devices, in particular to a modeling method of a power SiC D-MOSFET semiconductor device, and particularly relates to a SPICE temperature characteristic modeling method for the power semiconductor device. Background In order to meet the requirements of power electronic equipment in complex and special application environments, research on new materials and new devices is continuously in progress. The silicon carbide metal oxide semiconductor field effect transistor (silicon carbide metal-oxide-semiconductor field-EFFECTIVE TRANSISTOR, siC MOSFET) is an important power semiconductor device, and has wide application prospect in high temperature, high frequency, high voltage and other applications. Compared with the traditional silicon (Si) material device, the high thermal conductivity of the silicon carbide material determines the characteristic of high current density, and the high forbidden band width determines the high breakdown field strength and high working temperature of the SiC device, so that the SiC MOSFET is excellent in performance in extreme environments such as high temperature, high frequency and the like, and is concerned by engineering industry. Therefore, in development and application of the SiC MOSFET, compared with Si devices with the same power level, the SiC device has smaller volume, smaller on-resistance and switching loss, is suitable for higher working frequency, and has high-temperature resistant working characteristics, thus greatly improving the high-temperature stability of the device. Although silicon carbide materials have more excellent high temperature resistance characteristics compared to bulk silicon material process devices. For high temperature applications, however, the electrical characteristics of the power SiC MOSFET device still change with increasing temperature. For example, as temperature increases, the threshold voltage of a power MOSFET generally decreases, on-resistance increases resulting in increased on-loss, mobility of electrons and holes decreases to affect the on-characteristics and switching speed of the device, and leakage current increases resulting in reverse current and breakdown voltage variations. However, during the design phase of high temperature integrated circuits based on power devices, SPICE (Simulation Program WITH INTEGRATED Circuit Emphasis) circuit simulation tools are generally used for performing corresponding simulation calculations. Thus, SPICE model development of power SiC MOSFET semiconductor devices will face challenges, requiring consideration of a variety of factors to ensure simulation accuracy and practicality. In the process of developing SPICE models of high-temperature power semiconductor devices, relevant physical effects and model parameters which can describe the temperature characteristics of the devices, such as on-resistance, threshold voltage, carrier mobility, breakdown voltage, junction capacitance and the like, need to be introduced, so that the models have accurate prediction capability in a wide temperature range. therefore, temperature-dependent model parameters need to be introduced into SPICE models to reflect these changes. Meanwhile, a SPICE model verification method with multiple temperature points is needed, and the SPICE model with multiple temperature points is developed and verified aiming at nonlinear change of parameters of the high-temperature power device along with temperature. The model can be fitted and calibrated to ensure accuracy over a wide temperature range by experimental measurements or multiple temperature data obtained by TCAD (technical computer aided design, technology Computer AIDED DESIGN) simulations. In summary, siC MOSFETs are a key power semiconductor device, and in the process of establishing a high-temperature SPICE model, the above-mentioned temperature-related physical effects, process and model parameters need to be comprehensively considered, and verification and optimization are performed through experimental data. For example, the BSIM3HV model based on Verilog-A implementation can comprehensively consider the influence of interface states to provide a high-precision DC characteristic model. The high-temperature model has important guiding significance for the application of the SiC MOSFET in the design of a high-temperature integrated circuit. The existing modeling method generally comprises physical effect parameters, process parameters, general model parameters, simulation parameters obtained through actual measurement, fitting parameters used for calculation and the like. However, the known device temperature characteristic modeling method and parameter extraction method are mostly improved and perfected for the prepared power SICVERTICAL DIFFUSIONMOSFET (SiC D-MOSFET) semiconductor