CN-121997868-A - Electric heating parameter distribution simulation method and device for whole wafer power semiconductor device

CN121997868ACN 121997868 ACN121997868 ACN 121997868ACN-121997868-A

Abstract

The application relates to a distribution simulation method and a device for electric heating parameters of a whole wafer power semiconductor device, wherein the method establishes a refined electric heating parameter distribution calculation model by setting a first working condition parameter and analyzing by combining the acquisition result of multiple physical quantity parameters, radially divides the whole wafer device into multiple areas, realizes quantitative calculation and analysis of radial multiple area electric contact resistance, contact thermal resistance, current distribution and temperature distribution of the whole wafer power semiconductor device, can accurately acquire the current non-uniformity and temperature rise characteristics of different radial areas caused by contact state differences, enables the calculation result to be more consistent with the actual operation condition, accurately acquires the internal current and temperature distribution of the whole wafer device, further identifies potential failure risks in advance, and obviously improves the safety, reliability and engineering application adaptability of the device.

Inventors

TONO TADAHIRO
WANG JIACHENG
ZHANG XIANGYU
QI LEI

Assignees

华北电力大学

Dates

Publication Date: 20260508
Application Date: 20260409

Claims (10)

1. The electrothermal parameter distribution simulation method of the whole wafer power semiconductor device is characterized by comprising the following steps of: Determining a first working condition parameter and a device characteristic parameter of the whole wafer power semiconductor device, wherein the device characteristic parameter is a device inherent characteristic parameter set according to the preset matching corresponding specification of different types of whole wafer power semiconductor devices; Under the condition of being in the first working condition parameter, carrying out simulation test on the whole wafer power semiconductor device to obtain the working condition measurement parameter of the whole wafer power semiconductor device; Determining and obtaining a first parameter set of the whole wafer power semiconductor device according to the working condition measurement parameters and the device characteristic parameters, wherein the first parameter set at least comprises current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device; Solving and obtaining electrothermal parameter distribution data of each ring of the whole wafer power semiconductor device in an electrothermal bidirectional coupling iterative mode by taking the first parameter set as an initial condition; and constructing an equivalent circuit based on the electrothermal parameter distribution data of each ring, and performing simulation calculation through preset circuit simulation software to obtain the electrothermal parameter distribution result of the whole wafer power semiconductor device.
2. The method for simulating the distribution of electrothermal parameters of a full-wafer power semiconductor device according to claim 1, wherein the step of determining a first parameter set for obtaining the full-wafer power semiconductor device according to the operating condition measurement parameter and the device characteristic parameter comprises: Determining first calculation data according to the working condition measurement parameters and the device characteristic parameters, wherein the first calculation data at least comprises anode shell temperature, cathode shell temperature, power heat flow, semiconductor device average pressure, ring pressure, whole wafer device ring number, ring inner and outer ring radius, effective heat transfer area of each ring and series-parallel thermal resistance coefficient; Substituting the first calculation data into a first calculation function to obtain a first calculation result, wherein the first calculation result at least comprises anode contact thermal resistance and cathode contact thermal resistance of each ring; substituting the first calculation data and the first calculation result into a second calculation function to obtain a second calculation result, wherein the second calculation result at least comprises anode junction temperature, cathode junction temperature and junction temperature of each ring, and the second calculation function is a preset solution function for calculating the junction temperature of the semiconductor device.
3. The method for simulating the distribution of electrothermal parameters of a full-wafer power semiconductor device according to claim 1, wherein the step of determining a first parameter set for obtaining the full-wafer power semiconductor device according to the operating condition measurement parameter and the device characteristic parameter comprises: determining second calculation data according to the working condition measurement parameters and the device characteristic parameters, wherein the second calculation data at least comprises a current source value, voltages at two ends of a semiconductor device, the number of rings of the whole wafer device, material resistivity, material hardness, oxide layer tunnel resistivity, the number of conductive spots in unit area, equivalent elastic modulus, rough cover density, rough peak average curvature radius, gaussian distribution, contact spacing and inner and outer ring radii of each ring; Determining third calculation data according to the current source value and the voltages at two ends of the semiconductor device, wherein the third calculation data at least comprises the anode contact resistance and the cathode contact resistance of the whole wafer power semiconductor device; Substituting the second calculation data and the third calculation data into a third calculation function to obtain a third calculation result, wherein the third calculation result at least comprises anode contact resistance and cathode contact resistance of each ring; substituting the second calculation data into a fourth calculation function to obtain a fourth calculation result, wherein the fourth calculation result at least comprises the current of each ring.
4. The method for simulating the distribution of electrothermal parameters of a full-wafer power semiconductor device according to claim 3, wherein the step of obtaining the distribution data of electrothermal parameters of each ring of the full-wafer power semiconductor device by solving in a electrothermal bi-directional coupling iterative manner using the first parameter set as an initial condition comprises: Determining fourth calculation data based on the first parameter set, the working condition measurement parameters and the device characteristic parameters, wherein the fourth calculation data at least comprises a current source value, a preset current convergence threshold value, a preset junction temperature convergence threshold value, anode contact thermal resistance and cathode contact thermal resistance of each ring, junction temperature of each ring, anode contact resistance and cathode contact resistance of each ring, current of each ring, effective heat transfer area of each ring, number of rings of the whole wafer device, radius of the outer ring of each ring, equivalent radial heat conductivity coefficient of the device, first-order temperature sensitivity coefficient and second-order temperature sensitivity coefficient; Constructing and obtaining an electrothermal state quantity matrix of the kth iteration and a radial thermal diffusion coupling coefficient between adjacent rings based on fourth calculation data, wherein k is the iteration number, and when k=0, the electrothermal state quantity matrix is a corresponding value of the first parameter set; Determining the power heat flow of each loop of the (k+1) th iteration based on the electrothermal state quantity matrix of the (k) th iteration; Respectively constructing and obtaining a heat balance equation of an ith ring of the whole wafer power semiconductor device based on the electric heating state quantity matrix of the kth iteration, the power heat flows of each ring of the kth+1th iteration and radial heat diffusion coupling coefficients between adjacent rings; solving and obtaining the junction temperature of each ring under the k+1th iteration based on a heat balance equation of each ring of the whole wafer power semiconductor device; carrying out space weighted correction calculation on the contact thermal resistance of each ring in the electric heating state quantity matrix under the k-th iteration according to the junction temperature of each ring under the k+1th iteration to obtain the contact thermal resistance of each ring under the k+1th iteration; correcting and calculating the contact resistance of each ring in the electric heating state quantity matrix under the k-th iteration according to the junction temperature of each ring under the k+1th iteration to obtain the contact resistance of each ring under the k+1th iteration; Recalculating according to the contact resistance of each loop under the k+1th iteration to obtain the loop current of each loop under the k+1th iteration; Based on the contact thermal resistance, junction temperature, contact resistance and current of each loop in the k+1th iteration, constructing and obtaining an electrothermal state quantity matrix in the k+1th iteration; When the coupling iteration termination condition is met, the electrothermal state quantity matrix of the last iteration of each ring is used as electrothermal parameter distribution data of the corresponding ring in the whole wafer power semiconductor device, and when the coupling iteration termination condition is not met, the coupling iteration process is continued.
5. The method for simulating distribution of electrothermal parameters of a full-wafer power semiconductor device according to claim 4, wherein the coupling iteration termination conditions include a first termination condition and a second termination condition, the first termination condition is that a difference between junction temperatures of the rings before and after the iteration is less than a preset junction temperature convergence threshold, and the second termination condition is that a difference between currents of the rings before and after the iteration is less than a preset current convergence threshold.
6. The method for simulating the distribution of electrothermal parameters of a full wafer power semiconductor device according to claim 1, wherein the step of constructing an equivalent circuit based on the distribution data of electrothermal parameters of each ring comprises: Sequentially acquiring electric heating parameter distribution data of each ring of the whole wafer power semiconductor device from the center to the outside according to radial sequence by taking the geometric center of the whole wafer power semiconductor device as a reference, wherein the electric heating parameter distribution data comprises anode contact thermal resistance, cathode contact thermal resistance, junction temperature, anode contact resistance, cathode contact resistance and current; Respectively constructing equivalent branches of each ring based on electric heating parameter distribution data of each ring of the whole wafer power semiconductor device, wherein the equivalent branches comprise an anode contact resistance branch, a cathode contact resistance branch, an anode contact thermal resistance branch, a cathode contact thermal resistance branch and a ring branch of the semiconductor device; sequentially connecting an anode contact resistance branch, an anode contact thermal resistance branch, a ring branch of a semiconductor device, a cathode contact resistance branch and a cathode contact thermal resistance branch in series to form an equivalent circuit of a corresponding ring; And connecting the equivalent circuits of the rings in parallel end to end and connecting the gates of the ring branches of the semiconductor devices of the rings in parallel to form an n-ring equivalent circuit, wherein n is the total number of rings of the whole wafer power semiconductor device.
7. The method for simulating the distribution of electrothermal parameters of a full-wafer power semiconductor device according to claim 1, wherein the predetermined circuit simulation software is SPICE circuit simulation software.
8. The method for simulating distribution of electrothermal parameters of a whole wafer power semiconductor device according to claim 5, wherein the first operating condition parameters at least comprise type, model number, operating condition temperature value, operating condition pressure value, operating condition voltage value, current source value, preset current convergence threshold and preset junction temperature convergence threshold of the whole wafer power semiconductor device, and the device characteristic parameters at least comprise number of rings of the whole wafer device, radius of inner and outer rings of each ring, rough cover density, average radius of curvature of rough peak, contact distance, equivalent elastic modulus, material resistivity, material hardness, oxide layer tunnel resistivity, effective heat transfer area of each ring, number of conductive spots of unit area, semiconductor material density, specific heat capacity, corresponding material volume of each ring, equivalent radial heat conductivity coefficient of the device, gaussian distribution, first-order temperature sensitivity coefficient, second-order temperature sensitivity coefficient and series-parallel thermal resistivity.
9. The method for simulating the distribution of the electrothermal parameters of the whole wafer power semiconductor device according to claim 1, wherein the working condition measurement parameters at least comprise a temperature parameter, a pressure parameter and a voltage parameter, wherein the temperature parameter comprises anode shell temperature, cathode shell temperature and power heat flow, the pressure parameter comprises pressure values of all rings and average pressure values, and the voltage parameter comprises voltage at two ends of the semiconductor device.
10. An electrothermal parameter distribution simulation device for a whole wafer power semiconductor device is characterized by at least comprising: The parameter input module is used for determining a first working condition parameter and a device characteristic parameter of the whole wafer power semiconductor device, wherein the device characteristic parameter is a device inherent characteristic parameter set according to the preset matching corresponding specification of different types of whole wafer power semiconductor devices; The simulation test module is used for performing simulation test on the whole wafer power semiconductor device under the condition of being in the first working condition parameter to obtain the working condition measurement parameter of the whole wafer power semiconductor device; The parameter extraction module is used for determining and obtaining a first parameter set of the whole wafer power semiconductor device according to the working condition measurement parameters and the device characteristic parameters, wherein the first parameter set at least comprises current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device; The coupling solving module is used for solving and obtaining electrothermal parameter distribution data of each ring of the whole wafer power semiconductor device in an electrothermal bidirectional coupling iteration mode by taking the first parameter set as an initial condition; And the simulation output module is used for constructing an equivalent circuit based on the electric heating parameter distribution data of each ring, and performing simulation calculation through preset circuit simulation software to obtain an electric heating parameter distribution result of the whole wafer power semiconductor device.

Description

Electric heating parameter distribution simulation method and device for whole wafer power semiconductor device Technical Field The application relates to the technical field of simulation analysis of semiconductor devices, in particular to a simulation method and a simulation device for electric heating parameter distribution of a semiconductor device with whole wafer power. Background The flexible direct current transmission technology is used as a core support for constructing a novel power system, and becomes a key realization path for transregional transmission of inland and deep-open sea large-scale wind-solar-base electric energy. The reliable operation of the flexible direct current converter valve serving as an energy conversion core becomes a key technical bottleneck for restricting the safety guarantee of the whole service period of engineering. The power semiconductor device adopted by the flexible direct current converter valve is generally formed by packaging multi-chip parallel or whole wafer power semiconductor devices, and the electrical connection is realized mainly through external pressure. The phenomena of remarkable electric heating multiple physical field coupling effect and unbalanced stress exist in the semiconductor device generally, and particularly under the special overstress working conditions of extreme short circuit, surge, short-time overload and the like in a flexible-direct system, uneven radial current distribution and local temperature rise of a chip are easy to cause, so that thermal runaway, device performance degradation and even catastrophic failure are caused. Therefore, in the device design and application stage, the contact resistance distribution, the contact thermal resistance distribution, the current distribution and the temperature distribution of the whole wafer power semiconductor device under different working conditions need to be accurately evaluated so as to improve the safety and the reliability of the device. The existing method is based on the whole equivalent parameter model or the finite element multi-physical field simulation for analysis. The overall equivalent parameter model has simple modeling and high calculation speed, but omits radial non-uniformity remarkably existing in the whole wafer structure, and cannot reflect current crowding and local hot spot problems generated by pressure distribution differences in different radial regions. The simulation is carried out by establishing a three-dimensional model of the device, but the electrothermal distribution condition inside the device can be described more finely, but the model parameter dependence is strong, especially the contact resistance and thermal resistance parameters are difficult to obtain accurately, the calculation process is complex and takes long time, and the method is not suitable for rapid and multi-working-condition parameter evaluation in the application of the program. Therefore, a method for efficiently and accurately calculating the distribution of the internal electrothermal parameters of the whole wafer power semiconductor device under the given external working condition is needed to solve the problems in the prior art. Disclosure of Invention In order to overcome the defects in the prior art, the application provides a simulation method and a simulation device for the distribution of electrothermal parameters of a whole wafer power semiconductor device, which concretely adopts the following technical scheme: A whole wafer power semiconductor device electrothermal parameter distribution simulation method comprises the following steps: Determining a first working condition parameter and a device characteristic parameter of the whole wafer power semiconductor device, wherein the device characteristic parameter is a device inherent characteristic parameter set according to the preset matching corresponding specification of different types of whole wafer power semiconductor devices; Under the condition of being in the first working condition parameter, carrying out simulation test on the whole wafer power semiconductor device to obtain the working condition measurement parameter of the whole wafer power semiconductor device; Determining and obtaining a first parameter set of the whole wafer power semiconductor device according to the working condition measurement parameters and the device characteristic parameters, wherein the first parameter set at least comprises current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device; Solving and obtaining electrothermal parameter distribution data of each ring of the whole wafer power semiconductor device in an electrothermal bidirectional coupling iterative mode by taking the first parameter set as an initial condition; and constructing an equivalent circuit based on the electrothermal parameter distribution data of each ring, and performing simulati