CN-121997871-A - Data verification system and verification method

CN121997871ACN 121997871 ACN121997871 ACN 121997871ACN-121997871-A

Abstract

The data verification system comprises a verification module, a transmission module, a circuit simulation module and a verification module, wherein the verification module is used for generating a target signal in a first signal format and sending the target signal to the transmission module, the transmission module is used for receiving a simulation operation result generated based on the target signal and comparing the simulation operation result with a real operation result of the target signal to obtain a verification result, the transmission module is used for receiving the target signal in the first signal format at an input end and converting the target signal into a second signal format for transmission, the output end is used for converting the target signal in the second signal format back into the first signal format and outputting the target signal in the second signal format, the precision loss of the signal in the second signal format transmitted by the transmission module is smaller than that of the signal in the first signal format, and the circuit simulation module is used for receiving the target signal in the first signal format through the transmission module for operation and sending the generated simulation operation result to the verification module for verification.

Inventors

Zhao tianyang
Wang Minruihong
WANG JIANWEI
LI MINGZE

Assignees

北京算能科技有限公司

Dates

Publication Date: 20260508
Application Date: 20251231

Claims (10)

1. A data verification system, comprising: the verification module is used for generating a target signal in a first signal format, sending the target signal to the transmission module, receiving a simulation operation result generated based on the target signal through the transmission module, and comparing the simulation operation result with a real operation result of the target signal to obtain a verification result; The transmission module is used for receiving the target signal in the first signal format at the input end and converting the target signal into the second signal format for transmission, converting the target signal in the second signal format back to the first signal format at the output end and outputting the target signal, and the precision loss of the signal in the second signal format transmitted by the transmission module is smaller than that of the signal in the first signal format; the circuit simulation module is used for receiving the target signal in the first signal format through the transmission module to perform operation, and sending the generated simulation operation result to the verification module through the transmission module to perform verification.
2. The data verification system of claim 2, wherein the circuit simulation module comprises: The first analog unit is connected with the transmission module and is used for receiving the target signal and performing gain and analog-to-digital conversion processing to obtain a first intermediate signal in a second signal format; The digital filtering unit is connected with the first analog unit and is used for filtering the first intermediate signal to obtain a second intermediate signal; And the second analog unit is connected with the digital filtering unit and is used for performing digital-to-analog conversion and filtering processing on a second intermediate signal in a second signal format to obtain and output an analog operation result in the first signal format.
3. The data verification system of claim 2, wherein the first analog unit comprises: The amplifying subunit is used for acquiring the target signal in the first signal format and performing gain processing to obtain a gain signal; The first sub-transmission unit is connected with the amplifying subunit, and is used for receiving the gain signal from the amplifying subunit, converting the gain signal into a second signal format for transmission, converting the gain signal in the second signal format back into the first signal format at the output end, outputting the gain signal and transmitting the gain signal to the analog-to-digital conversion subunit; the analog-to-digital conversion subunit is connected with the first sub-transmission unit, and is used for carrying out quantization processing on the gain signal in the first signal format to obtain a first intermediate signal in the second signal format and outputting the first intermediate signal to the digital filtering unit.
4. The data verification system of claim 2, wherein the second simulation unit comprises: The digital-to-analog conversion subunit is used for receiving the second intermediate signal sent by the digital filtering unit and carrying out digital-to-analog conversion to obtain an analog signal in a first signal format after conversion; The second sub-transmission unit is connected with the digital-to-analog conversion sub-unit and is used for converting the analog signal in the first signal format into a second signal format for transmission, converting the analog signal in the second signal format back into the first signal format at the output end and transmitting the analog signal to the low-pass filtering sub-unit; And the low-pass filtering subunit is used for receiving the analog signals sent by the second sub-transmission unit and performing low-pass filtering processing to obtain the analog operation result, so that the transmission module sends the analog operation result to the verification module for verification.
5. The data verification system of claims 1-4, wherein the transmission module, the first sub-transmission unit, and the second sub-transmission unit each comprise a data transmission component comprising: An input subassembly for encoding the received signal in the first signal format to obtain a transmission signal in the second signal format; The transmission channel is connected with the input subassembly and is used for transmitting the transmission signal in a second signal format, the loss precision of the signal of the second signal format transmitted by the transmission channel is smaller than that of the signal of the first signal format transmitted by the transmission channel, the first signal format comprises an analog signal format, and the second signal format comprises a digital signal format; And the output sub-assembly is connected with the transmission channel and is used for receiving the transmission signal in the second signal format to perform data conversion, obtaining the signal in the first signal format and outputting the signal.
6. The data validation system of claim 5, wherein the input subassembly is configured to: converting the signal in the first signal format into a signal with a first preset bit number in a second signal format; And adding a start code with a second preset bit number before the signal with the second signal format to obtain a transmission signal with the second signal format.
7. The data validation system of claim 5, wherein the output sub-component is configured to: Generating a data valid signal when the transmission signal is received; Acquiring a signal to be processed in a second signal format based on the indication of the data valid signal, wherein the signal to be processed in the second signal format is obtained by performing shift processing on the transmission signal to remove the start code; Based on a redundancy mechanism, carrying out data effective detection on the signal to be processed, and determining an effective data interval of the signal to be processed; and obtaining the target signal in the first signal format by carrying out data conversion on the signal in the effective data interval.
8. The data validation system of claim 7, wherein the data valid signal is generated by: In response to detecting receipt of the start code, the output sub-component controls the data valid signal to a first level; and in response to the completion of the start code reception, the output subassembly controls the data valid signal to a second level until the signal reception of the first preset number of bits is completed.
9. The data verification system of claim 7, wherein the signal in the first signal format received by the input subassembly includes exponent data for a fourth predetermined number of bits, and wherein the output subassembly performs data efficient detection of the signal to be processed by: Extracting to-be-detected data of a preset interval from the to-be-processed signal, wherein the length of the preset interval is equal to the fourth preset bit number; and responding to the numerical range of the to-be-detected data conforming to the index data, and determining the effective data interval of the to-be-processed signal according to the preset interval.
10. A verification method applied to the data verification system of any one of claims 1-9, the method comprising: generating a target signal in a first signal format by using the verification module and sending the target signal to the transmission module; receiving a target signal in the first signal format by using a circuit simulation module through the transmission module to perform operation, and obtaining a simulation operation result generated based on the target signal; Receiving a simulation operation result generated based on the target signal through the transmission module by using a verification module; and comparing the simulation operation result with the real operation result of the target signal by using a verification module to obtain a verification result.

Description

Data verification system and verification method Technical Field The disclosure relates to the technical field of data processing and data transmission, in particular to a data verification system and a data verification method. Background In a mixed signal system, digital circuits interact closely with analog circuits. The digital or analog part can not be independently verified to cover the problems of interface compatibility, time sequence matching and the like, and the digital-analog hybrid circuit can cause the problems of reduced calculation efficiency, lost precision and the like due to protocol errors or abnormal signal conversion of the digital and analog interfaces. Disclosure of Invention In view of this, the present disclosure provides a data verification system and a verification method. One aspect of the disclosure provides a data verification system, which comprises a verification module, a transmission module, a circuit simulation module and a verification module, wherein the verification module is used for generating a target signal in a first signal format and sending the target signal to the transmission module, receiving an analog operation result generated based on the target signal through the transmission module, comparing the analog operation result with a real operation result of the target signal to obtain a verification result, the transmission module is used for receiving the target signal in the first signal format at an input end and converting the target signal in the first signal format into a second signal format for transmission, the output end is used for converting the target signal in the second signal format back into the first signal format and outputting the target signal in the second signal format, the precision loss of the signal in the second signal format transmitted by the transmission module is smaller than that of the signal in the first signal format, and the circuit simulation module is used for receiving the target signal in the first signal format through the transmission module for operation, and sending the generated analog operation result to the verification module for verification. According to the embodiment of the disclosure, the circuit simulation module comprises a first simulation unit, a digital filtering unit and a second simulation unit, wherein the first simulation unit is connected with the transmission module and is used for receiving a target signal to perform gain and analog-to-digital conversion processing to obtain a first intermediate signal in a second signal format, the digital filtering unit is connected with the first simulation unit and is used for performing filtering processing on the first intermediate signal to obtain a second intermediate signal, and the second simulation unit is connected with the digital filtering unit and is used for performing digital-to-analog conversion and filtering processing on the second intermediate signal in the second signal format to obtain and output a simulation operation result in the first signal format. According to the embodiment of the disclosure, the first analog unit comprises an amplifying subunit, a first sub-transmission unit and an analog-to-digital conversion subunit, wherein the amplifying subunit is used for acquiring a target signal in a first signal format and performing gain processing to obtain a gain signal, the first sub-transmission unit is connected with the amplifying subunit and is used for receiving the gain signal from the amplifying subunit and converting the gain signal into a second signal format for transmission, the output end is used for converting the gain signal in the second signal format back into the first signal format and outputting the first signal format and transmitting the first signal format to the analog-to-digital conversion subunit, the analog-to-digital conversion subunit is connected with the first sub-transmission unit and is used for performing quantization processing on the gain signal in the first signal format to obtain a first intermediate signal in the second signal format and outputting the first intermediate signal in the second signal format to the digital filtering unit. According to the embodiment of the disclosure, the second analog unit comprises a digital-to-analog conversion subunit, a second sub-transmission unit and a low-pass filtering subunit, wherein the digital-to-analog conversion subunit is used for receiving the second intermediate signal sent by the digital filtering unit and carrying out digital-to-analog conversion to obtain an analog signal in a converted first signal format, the second sub-transmission unit is connected with the digital-to-analog conversion subunit and is used for converting the analog signal in the first signal format into the second signal format and transmitting the second signal format, the output end is used for converting the analog signal in the second signal format back into the first signal