CN-121997878-A - Circuit layout method, apparatus, device, storage medium, and program product

CN121997878ACN 121997878 ACN121997878 ACN 121997878ACN-121997878-A

Abstract

The invention relates to a circuit layout method, a circuit layout device, a circuit layout equipment, a storage medium and a program product. The circuit layout method comprises the steps of searching a repeating unit group which has the same topological structure as a layout template in a circuit topological structure diagram, aggregating the repeating unit groups corresponding to the same layout template into independent layout units, wherein the repeating unit groups corresponding to the same layout template have the same relative position relationship among the circuit units after being laid out, and laying out the independent layout units. The invention obviously improves the layout design efficiency, avoids layout errors caused by manual operation and improves the accuracy of layout design.

Inventors

LUO LIN
SU HONGCHANG
HE ZHONGJUN
LIU GUANGHUI
YANG LIU
SHAO YALI

Assignees

北京华大九天科技股份有限公司

Dates

Publication Date: 20260508
Application Date: 20260303

Claims (10)

1. A circuit layout method, the circuit layout method comprising: searching a repeating unit group which has the same topological structure as the layout template in the circuit topological structure diagram, wherein the repeating unit group comprises a plurality of circuit units; Aggregating a plurality of repeating unit groups corresponding to the same layout template into independent layout units, wherein the plurality of repeating unit groups corresponding to the same layout template have the same relative position relationship among circuit units after being laid out; and carrying out layout on the independent layout units.
2. The circuit layout method according to claim 1, wherein the plurality of repeating unit groups corresponding to the same layout template have the same relative positional relationship among circuit units, comprising at least one of: The layout order of the circuit units with corresponding relation in the repeated unit groups corresponding to the same layout template is the same; The relative orientations among different circuit units in the repeated unit groups corresponding to the same layout template are the same; And in the repeated unit group corresponding to the same layout template, the distances between different circuit units are the same.
3. The circuit layout method according to claim 1, wherein the determining means of the layout template includes: determining a plurality of said circuit cells in a schematic circuit diagram; generating corresponding layout templates based on a plurality of the circuit units; The circuit schematic diagram is used for generating the circuit topology structure diagram.
4. A circuit layout method according to claim 3, wherein said searching for said repeating unit group in said circuit topology map which is identical to the topology of the layout template comprises: Converting the circuit schematic diagram into the circuit topology structure diagram, and converting the layout template into a template topology structure diagram; Searching a subgraph with the same structure as the template topological structure chart in the circuit topological structure chart, wherein a plurality of circuit units contained in each subgraph form a repeating unit group.
5. The circuit layout method according to claim 4, wherein said searching for the same sub-graph in the circuit topology map as the template topology map comprises: Searching a subgraph with the same structure as the template topological structure diagram in the circuit topological structure diagram by utilizing a subgraph matching algorithm; The structure is the same, and the structure comprises the same type of nodes and the same connection relation between the nodes.
6. The circuit layout method according to any one of claims 1 to 4, wherein the laying out the individual layout cells includes: in the layout process, each independent layout unit is used as an integral object to be laid out.
7. A circuit layout device is characterized in that, the circuit layout device includes: The searching module is configured to search a repeating unit group which is the same as the topology structure of the layout template in the circuit topology structure diagram, and the repeating unit group comprises a plurality of circuit units; An aggregation module configured to aggregate a plurality of the repeating unit groups corresponding to the same layout template into independent layout units, wherein the plurality of the repeating unit groups corresponding to the same layout template have the same relative positional relationship among circuit units after layout; And a layout module configured to layout the independent layout unit.
8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the circuit layout method of any of claims 1 to 6 when executing the computer program.
9. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the circuit layout method of any of claims 1 to 6.
10. A computer program product comprising a computer program or instructions which, when executed by a processor, implements the circuit layout method of any of claims 1 to 6.

Description

Circuit layout method, apparatus, device, storage medium, and program product Technical Field The present invention relates to the field of circuit design, and in particular, to a circuit layout method, apparatus, device, storage medium, and program product. Background In the design of digital circuits, there are multiple groups of repeated circuit units with the same connection relationship, and how to realize the layout design of the repeated units is a difficult problem to be solved. In the layout design in the related art, repeated circuit units are generally arranged nearby. However, when the number of the repeating units is large, the repeating structures are usually required to be manually identified and placed one by one, so that the layout design efficiency is low and manual errors are easily introduced. Disclosure of Invention To overcome the problems in the related art, the present invention provides a circuit layout method, apparatus, device, storage medium, and program product. According to a first aspect of an embodiment of the present invention, there is provided a circuit layout method including: searching a repeating unit group which has the same topological structure as the layout template in the circuit topological structure diagram, wherein the repeating unit group comprises a plurality of circuit units; Aggregating a plurality of repeating unit groups corresponding to the same layout template into independent layout units, wherein the plurality of repeating unit groups corresponding to the same layout template have the same relative position relationship among circuit units after being laid out; and carrying out layout on the independent layout units. In some exemplary embodiments, the plurality of repeating unit groups corresponding to the same layout template have the same relative positional relationship among circuit units, including at least one of: The layout order of the circuit units with corresponding relation in the repeated unit groups corresponding to the same layout template is the same; The relative orientations among different circuit units in the repeated unit groups corresponding to the same layout template are the same; And in the repeated unit group corresponding to the same layout template, the distances between different circuit units are the same. In some exemplary embodiments, the determining manner of the layout template includes: determining a plurality of said circuit cells in a schematic circuit diagram; generating corresponding layout templates based on a plurality of the circuit units; The circuit schematic diagram is used for generating the circuit topology structure diagram. In some exemplary embodiments, said searching the circuit topology structure diagram for the repeating unit group identical to the topology of the layout template comprises: Converting the circuit schematic diagram into the circuit topology structure diagram, and converting the layout template into a template topology structure diagram; Searching a subgraph with the same structure as the template topological structure chart in the circuit topological structure chart, wherein a plurality of circuit units contained in each subgraph form a repeating unit group. In some exemplary embodiments, the searching the circuit topology structure diagram for the sub-graph having the same structure as the template topology structure diagram includes: Searching a subgraph with the same structure as the template topological structure diagram in the circuit topological structure diagram by utilizing a subgraph matching algorithm; The structure is the same, and the structure comprises the same type of nodes and the same connection relation between the nodes. In some exemplary embodiments, the laying out the independent layout unit includes: in the layout process, each independent layout unit is used as an integral object to be laid out. According to a second aspect of the embodiments of the present invention, there is provided a circuit layout apparatus comprising: The searching module is configured to search a repeating unit group which is the same as the topology structure of the layout template in the circuit topology structure diagram, and the repeating unit group comprises a plurality of circuit units; An aggregation module configured to aggregate a plurality of the repeating unit groups corresponding to the same layout template into independent layout units, wherein the plurality of the repeating unit groups corresponding to the same layout template have the same relative positional relationship among circuit units after layout; And a layout module configured to layout the independent layout unit. According to a third aspect of embodiments of the present invention, there is provided a computer device comprising a memory storing a computer program and a processor implementing the circuit layout method according to the first aspect when executing the computer program. According to a fourth aspect of