Search

CN-121999824-A - Magnetic memory device

CN121999824ACN 121999824 ACN121999824 ACN 121999824ACN-121999824-A

Abstract

A magnetic memory device includes a cell array including a memory cell including a first magnetic tunnel junction element, and a one-time programmable (OTP) cell including a second magnetic tunnel junction element, and a control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell, and to determine whether a resistance of the OTP cell changes after applying the write current to the OTP cell.

Inventors

  • JIN DAZHI

Assignees

  • 三星电子株式会社

Dates

Publication Date
20260508
Application Date
20250925
Priority Date
20241106

Claims (20)

  1. 1. A magnetic memory device comprising: A cell array comprising: a memory cell including a first magnetic tunnel junction element, and One-time programmable OTP unit including second magnetic tunnel junction element, and A control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell and determine whether a resistance of the OTP cell changes after the write current is applied to the OTP cell.
  2. 2. The magnetic memory device of claim 1, Wherein the cell array further comprises a reference cell comprising a third magnetic tunnel junction element, an Wherein the control circuit is further configured to use the reference cell to determine whether a resistance of the OTP cell has changed.
  3. 3. The magnetic memory device of claim 1, Wherein the control circuit is further configured to determine whether the resistance of the OTP unit cell has changed using a reference resistor having a fixed resistance value.
  4. 4. The magnetic memory device of claim 1, Wherein the cell array further comprises: a first reference unit including a third magnetic tunnel junction element, and A second reference unit including a fourth magnetic tunnel junction element, and Wherein the control circuit is further configured to perform a read operation on the memory cell using the first reference cell and the second reference cell, and to determine whether the resistance of the OTP cell changes using the first reference cell and the second reference cell.
  5. 5. The magnetic memory device of claim 4, Wherein the first reference unit is connected to the first input/output circuit, an Wherein the second reference unit is connected to a second input/output circuit different from the first input/output circuit.
  6. 6. The magnetic memory device of claim 1, Wherein the control circuit is further configured to determine whether a resistance of the OTP cell changes based on a change in a magnitude of the write current when the write current is applied to the OTP cell.
  7. 7. The magnetic memory device of claim 1, Wherein the memory cell is connected to a first word line, an Wherein the OTP cell is connected to a second word line different from the first word line.
  8. 8. The magnetic memory device of claim 1, Wherein the memory cell is connected to a first bit line, an Wherein the OTP cell is connected to a second bit line different from the first bit line.
  9. 9. The magnetic memory device of claim 1, Wherein the memory cell is connected to a first input/output circuit, an Wherein the OTP unit is connected to a second input/output circuit different from the first input/output circuit.
  10. 10. The magnetic memory device of claim 1, Wherein the memory cell and the OTP cell are connected to the same input/output circuit.
  11. 11. The magnetic memory device of claim 1, Wherein the OTP cell is connected to a bit line and a source line, an Wherein the write current includes a first write current flowing from the bit line to the source line and a second write current flowing from the source line to the bit line.
  12. 12. The magnetic memory device of claim 1, Wherein the magnitude of the write current is less than the magnitude of a breakdown current used to write the OTP cell into a breakdown state.
  13. 13. A magnetic memory device comprising: A cell array comprising: a memory cell including a first magnetic tunnel junction element and a first cell transistor, and One-time programmable OTP unit comprising a second magnetic tunnel junction element and a second unit transistor, and Control circuitry configured to: Applying a write current to the memory cell to perform a write operation to the memory cell, and The write current is applied to the OTP cell to perform a read operation on the OTP cell.
  14. 14. The magnetic memory device of claim 13, Wherein the memory cell further comprises a reference cell comprising a third magnetic tunnel junction element and a third cell transistor, an Wherein the control circuit is further configured to perform a read operation on the OTP cell by comparing a read current flowing through the OTP cell with a reference current flowing through the reference cell.
  15. 15. The magnetic memory device of claim 13, Wherein the memory cell further comprises a reference cell comprising a third cell transistor, Wherein the reference cell is connected to a resistor having a constant resistance value, an Wherein the control circuit is further configured to perform a read operation on the OTP cell by comparing a read current flowing through the OTP cell with a reference current flowing through the resistor and the reference cell.
  16. 16. The magnetic memory device of claim 13, Wherein the control circuit is further configured to perform a read operation on the OTP cell by determining whether a magnitude of the write current flowing through the OTP cell is changing.
  17. 17. The magnetic memory device of claim 13, Wherein the control circuit is further configured to end a write operation to the memory cell based on a change in magnitude of the write current flowing through the memory cell.
  18. 18. The magnetic memory device of claim 13, Wherein the first cell transistor and the second cell transistor are gated to the same word line.
  19. 19. The magnetic memory device of claim 13, Wherein the first cell transistor is gated to a first word line, an Wherein the second cell transistor is gated to a second word line different from the first word line.
  20. 20. A magnetic memory device comprising: a cell array including a reference cell including a first magnetic tunnel junction element, a memory cell including a second magnetic tunnel junction element, and a one-time programmable OTP cell including a second magnetic tunnel junction element, and Control circuitry configured to: Performing a read operation on the memory cell using the reference cell; Applying a write current to the OTP cell, and A read operation is performed on the OTP cell based on a current flowing through the reference cell or a change in magnitude of the write current.

Description

Magnetic memory device Cross Reference to Related Applications The present application is based on and claims priority of korean patent application No.10-2024-0156533 filed in the korean intellectual property office on month 11 and 6 of 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field The present disclosure relates to a magnetic memory device. Background As electronic devices become faster and consume less power, it is increasingly desirable for memory devices to be capable of high speed read/write operations and low operating voltages, for example, magnetic memory devices may provide these functions. Magnetic memory devices are attracting attention as next-generation memories because they can be nonvolatile and can operate at high speed. One example of a magnetic memory device is Spin Transfer Torque (STT) Magnetic Random Access Memory (MRAM) (which may be referred to as STT-MRAM), which may store information using the STT phenomenon. STT-MRAM can store information by applying a current directly to the magnetic tunnel junction element to induce magnetization reversal. Highly integrated STT-MRAM can provide high speed operation and low current operation. One Time Programmable (OTP) memory may refer to a nonvolatile memory that can permanently store data using a one time programming operation. OTP can be used in applications where data stability and security are important, with the goal of recording specific information only once and continuously reading it. Since the OTP memory can be programmed only once, the information cannot be changed, thereby ensuring the integrity and reliability of the data. OTP memory may be used in applications where reliability and security are required. For example, the OTP memory may be used to store information such as digital security tokens, smart cards, keys, passwords, boot codes (booting code), and manufacturing/production settings, and may be integrated as part of a semiconductor chip or may be provided as a separate chip. If the OTP memory is part of a chip, it can be implemented at low cost without affecting the performance of the core logic, with complete compatibility with the logic Complementary Metal Oxide Semiconductor (CMOS) process. Disclosure of Invention A magnetic memory device is provided that can perform a read operation of a one-time programmable (OTP) cell without a reference resistor. However, aspects of the present disclosure are not limited to what is set forth herein. Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments. According to one aspect of the present disclosure, a magnetic memory device includes a cell array including a memory cell including a first magnetic tunnel junction element, and a one-time programmable (OTP) cell including a second magnetic tunnel junction element, and a control circuit configured to perform a read operation on the OTP cell by applying a write current to the OTP cell, and determine whether a resistance of the OTP cell changes after applying the write current to the OTP cell. According to one aspect of the disclosure, a magnetic memory device includes a cell array including a memory cell including a first magnetic tunnel junction element and a first cell transistor, and an OTP cell including a second magnetic tunnel junction element and a second cell transistor, and a control circuit configured to apply a write current to the memory cell to perform a write operation to the memory cell, and to apply a write current to the OTP cell to perform a read operation to the OTP cell. According to one aspect of the disclosure, a magnetic memory device includes a cell array including a reference cell including a first magnetic tunnel junction element, a memory cell including a second magnetic tunnel junction element, and a one-time programmable OTP cell, and a control circuit configured to perform a read operation on the memory cell using the reference cell, apply a write current to the OTP cell, and perform a read operation on the OTP cell based on a current flowing through the reference cell or a change in a magnitude of the write current. Drawings The foregoing and other aspects, features, and advantages of certain embodiments of the disclosure will be more apparent from the following description, taken in conjunction with the accompanying drawings, in which: FIG. 1 is an exemplary block diagram of a magnetic memory device according to some embodiments; FIG. 2 is an exemplary circuit diagram for illustrating a magnetic memory device according to some embodiments; FIG. 3 is an exemplary circuit diagram illustrating a memory cell according to some embodiments; FIG. 4 is an exemplary circuit diagram for illustrating a one-time programmable (OTP) cell in accordance with some embodiments; FIG. 5 is a diagram illustrating the resistances of a memory c