CN-121999846-A - Method and device for eliminating resistance state error of resistance change memory

CN121999846ACN 121999846 ACN121999846 ACN 121999846ACN-121999846-A

Abstract

The disclosure provides a method and a device for eliminating a resistance state error of a resistance change memory, which can be applied to the technical field of memories. The method for eliminating the resistance state error of the resistance change memory comprises the steps of obtaining preset weight corresponding to the resistance change memory, applying a modulation excitation signal to the resistance change memory based on the preset weight corresponding to the resistance change memory and a first preset boundary to obtain a modulated resistance value of the modulated resistance change memory, wherein the first preset boundary is obtained according to a preset low resistance state threshold value, a preset high resistance state threshold value and a preset first error boundary resistance value, and analyzing the modulated resistance value and a second preset boundary to obtain a first target mapping result corresponding to the resistance change memory, wherein the second preset boundary is obtained according to a preset low resistance state threshold value and a preset second error boundary resistance value, and the second error boundary resistance value is larger than the first error boundary resistance value.

Inventors

DONG DANIAN
XU XIAOXIN
ZHENG XU
YANG JIANGUO
YI HAILAN
YU ZHAOAN
YAO ZHIHONG

Assignees

中国科学院微电子研究所

Dates

Publication Date: 20260508
Application Date: 20241104

Claims (10)

1. A method of eliminating a resistive state error of a resistive random access memory, comprising: Acquiring a preset weight corresponding to the resistance random access memory; applying a modulation excitation signal to the resistive random access memory based on the preset weight corresponding to the resistive random access memory and a first preset boundary to obtain a modulated resistance value of the modulated resistive random access memory, wherein the first preset boundary is obtained according to a preset low resistance state threshold value, a preset high resistance state threshold value and a preset first error boundary resistance value; Analyzing the modulation resistance value and a second preset boundary to obtain a first target mapping result corresponding to the resistance change memory, wherein the second preset boundary is obtained according to the preset low-resistance state threshold value and a preset second error boundary resistance value, the second error boundary resistance value is larger than the first error boundary resistance value, and the first target mapping result represents a mapping relation between the modulation resistance value and an output logic value of the resistance change memory under the condition of simulating and eliminating errors.
2. The method of claim 1, wherein the predetermined weight corresponding to the resistive random access memory is characterized as a logic 1 or a logic 0.
3. The method of claim 1, wherein the structure of the resistive random access memory comprises an upper electrode, a resistive material layer, and a lower electrode, the first preset boundary comprising a first sub-preset boundary and a second sub-preset boundary; The step of applying a modulation excitation signal to the resistive random access memory based on the preset weight and the first preset boundary corresponding to the resistive random access memory to obtain a modulated resistance value of the modulated resistive random access memory, includes: Applying the modulation excitation signal to an upper electrode of the resistive random access memory under the condition that the preset weight is characterized as logic 1, so as to obtain a first intermediate modulation resistance value of the resistive random access memory; applying the modulation excitation signal to the upper electrode of the resistive random access memory under the condition that the first intermediate modulation resistance value is larger than a first sub-preset boundary until the first intermediate modulation resistance value of the resistive random access memory is smaller than the first sub-preset boundary; And under the condition that the first intermediate modulation resistance value is smaller than the first sub-preset boundary, determining the first intermediate modulation resistance value of the resistance random access memory as the modulation resistance value corresponding to the resistance random access memory.
4. A method according to claim 3, wherein the first sub-preset boundary is a boundary resistance value obtained by summing the preset low resistance state threshold value and the first error boundary resistance value.
5. A method according to claim 3, wherein the method further comprises: Applying a modulation excitation signal to a lower electrode of the resistive random access memory under the condition that the predetermined weight is characterized as logic 0, so as to obtain a second intermediate modulation resistance value of the resistive random access memory; Under the condition that the second intermediate modulation resistance value is smaller than the second sub-preset boundary, a modulation excitation signal is applied to the lower electrode of the resistance random access memory until the second intermediate modulation resistance value of the resistance random access memory is larger than the second sub-preset boundary; and under the condition that the second intermediate modulation resistance value is larger than the second sub-preset boundary, determining the second intermediate modulation resistance value of the resistance random access memory as the modulation resistance value corresponding to the resistance random access memory.
6. The method of claim 5, wherein the second sub-preset boundary is a boundary resistance value obtained by performing a difference process on the preset high resistance threshold and the second error boundary resistance value.
7. The method of claim 1, wherein the analyzing the modulation resistance and the second preset boundary to obtain a first target mapping result corresponding to the resistive random access memory comprises: Under the condition that the modulation resistance value is smaller than the second preset boundary, determining that a first target mapping result corresponding to the resistance change memory is logic 1; and under the condition that the modulation resistance value is larger than the second preset boundary, obtaining a first target mapping result corresponding to the resistance change memory as logic 0.
8. The method of claim 7, wherein the second preset boundary is a boundary resistance value obtained by summing the preset low-resistance state threshold value and the second error boundary resistance value.
9. The method of claim 1, wherein the method further comprises: Acquiring an initial resistance value of the resistance random access memory, wherein the initial resistance value is a current resistance value obtained by measuring the resistance random access memory; Determining the current weight corresponding to the resistance change memory according to the initial resistance value and the preset low resistance state threshold value; and under the condition that the current weight is consistent with the preset weight, analyzing the initial resistance value and the second preset boundary to obtain a second target mapping result, wherein the second target mapping result represents a mapping relation between the initial resistance value and an output logic value of the resistance random access memory under the condition of eliminating errors through simulation.
10. An apparatus for eliminating configuration errors of a resistive random access memory, comprising: The acquisition module is used for acquiring the preset weight corresponding to the resistance random access memory; The first error boundary module is used for applying a modulation excitation signal to the resistive random access memory based on the preset weight corresponding to the resistive random access memory and a first preset boundary to obtain a modulated resistance value of the modulated resistive random access memory, wherein the first preset boundary is obtained according to a preset low resistance threshold value, a preset high resistance threshold value and a preset first error boundary resistance value; The second error boundary module is used for analyzing the modulation resistance value and a second preset boundary to obtain a first target mapping result corresponding to the resistance change memory, wherein the second preset boundary is obtained according to the preset low resistance state threshold value and a preset second error boundary resistance value, the second error boundary resistance value is larger than the first error boundary resistance value, and the target mapping result represents a mapping relation between the modulation resistance value and an output logic value of the resistance change memory under the condition of eliminating errors in a simulation mode.

Description

Method and device for eliminating resistance state error of resistance change memory Technical Field The present disclosure relates to the field of memory technologies, and in particular, to a method and an apparatus for eliminating a resistive state error of a resistive random access memory. Background With the rapid development of deep neural network algorithms, in order to break through the limitation of von neumann bottleneck existing between a processor and a memory, an in-memory computing architecture is proposed. By using a cross array of resistive random access memories, matrix vector multiplication can be accomplished in an in-memory computational manner. However, when the resistive random access memory is stimulated by an external voltage or current, the resistive random access memory may relax over time, resulting in high-low configuration aliasing. In the process of realizing the disclosed conception, the inventor finds that the related art has the technical problem that the resistance random access memory has irremovable relaxation phenomenon due to inconsistent programming parameters of the resistance random access memory array units, and the non-ideal characteristic is brought to a computing system constructed based on the resistance random access memory array, so that the performance is poor. BRIEF SUMMARY OF THE PRESENT DISCLOSURE In view of the above, the present disclosure provides a method and apparatus for eliminating a resistive state error of a resistive random access memory. According to a first aspect of the disclosure, a method for eliminating a resistance state error of a resistance change memory is provided, wherein the method comprises the steps of obtaining a preset weight corresponding to the resistance change memory, applying a modulation excitation signal to the resistance change memory based on the preset weight corresponding to the resistance change memory and a first preset boundary to obtain a modulated resistance value of the modulated resistance change memory, wherein the first preset boundary is obtained according to a preset low resistance state threshold value, a preset high resistance state threshold value and a preset first error boundary resistance value, analyzing the modulated resistance value and a second preset boundary to obtain a target mapping result corresponding to the resistance change memory, the second preset boundary is obtained according to a preset low resistance state threshold value and a preset second error boundary resistance value, the second error boundary resistance value is larger than the first error boundary resistance value, and the target mapping result represents a mapping relation between the modulated resistance value of the resistance change memory and an output logic value under the condition of simulating and eliminating errors. The second aspect of the disclosure provides a device for eliminating configuration errors of a resistive random access memory, which comprises an acquisition module for acquiring preset weights corresponding to the resistive random access memory, a first error boundary module for applying a modulation excitation signal to the resistive random access memory based on the preset weights corresponding to the resistive random access memory and a first preset boundary to obtain a modulated resistance value of the modulated resistive random access memory, wherein the first preset boundary is obtained according to a preset low resistance state threshold value, a preset high resistance state threshold value and a preset first error boundary resistance value, and a second error boundary module for analyzing the modulated resistance value and the second preset boundary to obtain a first target mapping result corresponding to the resistive random access memory, wherein the second preset boundary is obtained according to a preset low resistance state threshold value and a preset second error boundary resistance value, the second error boundary resistance value is larger than the first error boundary resistance value, and the target mapping result represents a mapping relation between the modulated resistance value and an output logic value of the resistive random access memory under the condition of simulating and eliminating errors. A third aspect of the present disclosure provides an electronic device comprising one or more processors and a memory for storing one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to perform the above-described method. A fourth aspect of the present disclosure also provides a computer-readable storage medium having stored thereon executable instructions that, when executed by a processor, cause the processor to perform the above-described method. A fifth aspect of the present disclosure also provides a computer program product comprising a computer program which, when executed by a processor, implements th