CN-122000200-A - Multilayer ceramic capacitor and method for manufacturing the same

CN122000200ACN 122000200 ACN122000200 ACN 122000200ACN-122000200-A

Abstract

The present disclosure provides a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes a capacitor body and an external electrode disposed on an outer surface of the capacitor body. The capacitor body includes an active region in which first dielectric layers and inner electrode layers are alternately disposed, and a coverage region in which second dielectric layers are disposed on upper and lower surfaces of the active region in a stacking direction, the outer electrode includes an interface layer disposed on a surface of the active region and an outer layer covering the interface layer, the interface layer has a bridge structure including a body region, a plurality of pillar regions, and a crossing region disposed between the plurality of pillar regions, the pillar regions of the interface layer are connected to the inner electrode layers, and the crossing region of the interface layer is disposed on a surface of the first dielectric layer. The ratio of the number of the inner electrode layers connected to the pillar region of the interface layer is greater than or equal to 90% and less than or equal to 100% based on the total number of the inner electrode layers in the effective region.

Inventors

CHENG GUANGDONG
Cui Fenggui
Li Dujing
Yin Xuanhao
JIN ZHENGLIE

Assignees

三星电机株式会社

Dates

Publication Date: 20260508
Application Date: 20250701
Priority Date: 20241104

Claims (20)

1. A multilayer ceramic capacitor comprising: A capacitor body including a plurality of dielectric layers including a first dielectric layer and a second dielectric layer and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween, and An external electrode disposed on an outer surface of the capacitor body, Wherein the capacitor body includes an active region including the first dielectric layer and the inner electrode layer, and a coverage region including the second dielectric layer disposed on a first surface of the active region and a second surface of the active region, wherein the first surface is opposite to the second surface in a stacking direction, The external electrode includes an interface layer disposed on the third surface and/or the fourth surface of the active region, and an external layer covering the interface layer, The interfacial layer having a bridge structure comprising a body region, a plurality of pillar regions connected to the body region, and a crossover region disposed between the plurality of pillar regions, The pillar regions of the interface layer are connected to the inner electrode layer, The crossover region of the interfacial layer is disposed on the surface of the first dielectric layer, and The ratio of the number of the inner electrode layers connected to the column regions of the interface layer is greater than or equal to 90% and less than or equal to 100% based on the total number of the inner electrode layers in the effective region.
2. The multilayer ceramic capacitor according to claim 1, wherein, The pillar region of the interface layer extends to the inside of the capacitor body and is connected to the internal electrode layer.
3. The multilayer ceramic capacitor according to claim 1, wherein, The pillar region of the interfacial layer comprises an alloy comprising a conductive metal.
4. The multilayer ceramic capacitor according to claim 1, wherein, The pillar regions of the interface layer include a Cu-Ni alloy.
5. The multilayer ceramic capacitor according to claim 3, wherein, The columnar regions of the interface layer include the alloy in an amount of 60 to 100 volume percent based on the total amount of the columnar regions.
6. The multilayer ceramic capacitor according to claim 1, wherein, The crossover region of the interfacial layer comprises glass.
7. The multilayer ceramic capacitor according to claim 6, wherein, The glass includes at least one selected from the group consisting of Al 2 O 3 and SiO 2 .
8. The multilayer ceramic capacitor according to claim 6, wherein, The spanned region of the interfacial layer includes the glass in an amount of 60 to 100 volume percent based on the total amount of the spanned region.
9. The multilayer ceramic capacitor according to claim 1, wherein, The body region of the interfacial layer includes a conductive metal.
10. The multilayer ceramic capacitor according to claim 1, wherein, The body region of the interfacial layer includes Cu.
11. The multilayer ceramic capacitor according to claim 9, wherein, The body region of the interfacial layer includes the conductive metal in an amount of 60 to 100 volume percent based on the total amount of the body region.
12. The multilayer ceramic capacitor according to claim 1, wherein, The pillar regions of the interface layer comprise an alloy comprising a conductive metal, The spanned region of the interfacial layer comprises glass, and The body region of the interfacial layer includes the conductive metal.
13. The multilayer ceramic capacitor according to claim 1, wherein, The pillar regions of the interface layer comprise a Cu-Ni alloy, The spanned region of the interfacial layer comprises glass, and The body region of the interfacial layer includes Cu.
14. The multilayer ceramic capacitor according to claim 1, wherein, The inner electrode layer comprises an alloy at the interface with the interface layer, and The alloy includes a conductive metal.
15. A multilayer ceramic capacitor comprising: A capacitor body including a plurality of dielectric layers including a first dielectric layer and a second dielectric layer and a plurality of internal electrode layers stacked with the first dielectric layer interposed therebetween, and An external electrode disposed on an outer surface of the capacitor body, Wherein the capacitor body includes an active region including the first dielectric layer and the inner electrode layer, and a coverage region including the second dielectric layer disposed on a first surface of the active region and a second surface of the active region, wherein the first surface is opposite to the second surface in a stacking direction, The external electrode includes an interface layer disposed on the third surface and/or the fourth surface of the active region, and an external layer covering the interface layer, The interfacial layer having a bridge structure comprising a body region, a plurality of pillar regions connected to the body region, and a crossover region disposed between the plurality of pillar regions, The pillar regions of the interface layer are connected to the inner electrode layer, The crossover region of the interfacial layer is disposed on a surface of the first dielectric layer, The body region of the interfacial layer comprises a conductive metal, The pillar region of the interfacial layer comprises an alloy comprising the conductive metal, and The crossover region of the interfacial layer comprises glass.
16. The multilayer ceramic capacitor according to claim 15, wherein, The conductive metal comprises Cu and is preferably a metal, The alloy includes a Cu-Ni alloy, and The glass includes Al 2 O 3 and SiO 2 .
17. A method of manufacturing a multilayer ceramic capacitor, comprising: Forming an external electrode on a surface of a capacitor body including a plurality of dielectric layers and a plurality of internal electrode layers stacked with the dielectric layers interposed therebetween, wherein the external electrode includes an interface layer and an external layer covering the interface layer, The step of forming the external electrode includes applying a metal organic decomposition ink to the surface of the capacitor body, reducing the applied metal organic decomposition ink to form a metal particle film, applying a paste including a conductive metal and a glass composition on the metal particle film, and firing the metal particle film and the applied paste to form the interface layer and the external layer, Wherein the interfacial layer has a bridge structure comprising a body region, a plurality of pillar regions connected to the body region, and a crossover region disposed between the plurality of pillar regions, The columnar region of the interface layer is connected to the internal electrode layer, and The crossover region of the interfacial layer is disposed on a surface of the dielectric layer.
18. The method of claim 17, wherein, The metal organic decomposition ink includes a metal ligand material, an amine compound, a binder, an antioxidant, and a solvent.
19. The method of claim 17, wherein, The metal particle film includes metal nanoparticles having a size of 10nm to 100 nm.
20. The method of claim 17, wherein, The paste includes the glass composition in an amount of 20wt% to 40wt%, based on the total amount of the paste.

Description

Multilayer ceramic capacitor and method for manufacturing the same Technical Field The present disclosure relates to a multilayer ceramic capacitor and a method of manufacturing the same. Background As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, piezoresistors, thermistors, and the like. Among ceramic electronic components, a multilayer ceramic capacitor (MLCC) is used in various electronic devices due to advantages such as small size, high capacitance, and easy installation. For example, the multilayer ceramic capacitor may be a chip capacitor mounted on a printed circuit board of various electronic products such as an imaging device (e.g., a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), etc.), a computer, a personal portable terminal, a smart phone, etc., for charging or discharging thereof. Recently, with miniaturization and high capacitance of MLCCs, research is being conducted on miniaturization of thicknesses of internal electrodes and dielectric layers, and research is being actively conducted to improve contact between internal electrodes and external electrodes. In order to improve connectivity between the inner electrode and the outer electrode, a paste for forming the outer electrode including small-sized metal particles should be used. However, as the metal particles used become smaller, the cost per particle increases due to the difficulty of synthesis, and in addition, the content of other polymers (such as a dispersant and a binder) required to improve the dispersibility and the adhesiveness of the paste for forming external electrodes also relatively increases. As the content of other polymers increases, the metal solids content becomes relatively low, which changes viscosity and rheological properties, affecting printing characteristics. Disclosure of Invention The present disclosure provides a multilayer ceramic capacitor having improved connectivity between an inner electrode layer and an outer electrode, thereby exhibiting excellent capacitance characteristics and moisture resistance reliability. The present disclosure provides a method of manufacturing a multilayer ceramic capacitor. A multilayer ceramic capacitor according to an aspect of the present disclosure includes a capacitor body including a plurality of dielectric layers including a first dielectric layer and a second dielectric layer and a plurality of inner electrode layers stacked with the first dielectric layer interposed therebetween, and an external electrode disposed on an outer surface of the capacitor body, wherein the capacitor body includes an effective region including the first dielectric layer and the inner electrode layers and a coverage region including the second dielectric layer disposed on a first surface and a second surface of the effective region, wherein the first surface is opposite to the second surface in a stacking direction, the external electrode includes an interface layer disposed on a third surface and/or a fourth surface of the effective region, the external layer covers the interface layer, the bridge structure includes a body region, a plurality of pillar regions, and a crossover region, the body region is connected to the first dielectric layer and the inner electrode layers, the ratio of the pillar regions to the electrode is equal to or less than about 90% based on the total number of the interface layer disposed in the interface layer, the interface layer is disposed on the interface layer, and the interface layer is disposed on the surface of about the pillar region or the total of about 90%. The pillar region of the interface layer may extend to the inside of the capacitor body and be connected to the inner electrode layer. The pillar regions of the interface layer may comprise an alloy comprising a conductive metal. The pillar regions of the interface layer may include a Cu-Ni alloy. The columnar regions of the interfacial layer may include the alloy in an amount of about 60% to about 100% by volume based on the total amount of the columnar regions. The spanned region of the interfacial layer may comprise glass. The glass may include at least one selected from the group consisting of alumina (Al 2O3) and silica (SiO 2). The spanned region of the interfacial layer may include the glass in an amount of about 60% to about 100% by volume based on the total amount of the spanned region. The body region of the interfacial layer may include a conductive metal. The body region of the interfacial layer may include copper (Cu). The body region of the interfacial layer may include the conductive metal in an amount of about 60% to about 100% by volume based on the total amount of the body region. The pillar regions of the interface layer may comprise an alloy comprising a conductive metal, the crossover region of the interface layer may comprise glass, and the body region of the interface layer may comprise the conductive met