CN-122001247-A - BLDC motor turn number anti-interference calculation method and system based on dynamic time window verification

CN122001247ACN 122001247 ACN122001247 ACN 122001247ACN-122001247-A

Abstract

The invention discloses a BLDC motor turn number anti-interference calculation method and system based on dynamic time window verification, and belongs to the technical field of motor control. The method comprises the steps of collecting Hall sensor signals of a BLDC motor, carrying out edge detection and jitter elimination processing to generate Hall jump edges, measuring time intervals of adjacent effective Hall jump edges based on a system clock to obtain a current period, calculating window lower bounds and window upper bounds of dynamic time windows according to the current period and dynamic adjustment coefficients, carrying out three-level pulse judgment according to the relation between the arrival time of the Hall jump edges and the dynamic time windows, triggering circle number accumulation when effective pulses are judged, shielding the pulses when burr pulses are judged, generating compensation pulses when signals are judged to be lost, and triggering circle number accumulation. The invention solves the problems of insufficient anti-interference capability and lack of signal loss compensation mechanism in the variable speed working condition and strong electromagnetic interference environment in the prior art, and obviously improves the accuracy and reliability of the calculation of the number of turns.

Inventors

HE KAI
LIN PING
HU QINGYUN
GUO PENGFEI
Shi dongxin
LI GUOCUN
WANG QIANCHENG
HU YUTING
ZHAO YONGFENG

Assignees

成都凯天电子股份有限公司

Dates

Publication Date: 20260508
Application Date: 20260408

Claims (9)

1. The BLDC motor turn number anti-interference calculation method based on dynamic time window verification is characterized by comprising the following steps of: collecting a Hall sensor signal of a BLDC motor, performing edge detection and jitter elimination processing, and generating a Hall jump edge; measuring the time interval between adjacent effective Hall jump edges based on a system clock to obtain a current period; calculating a window lower boundary and a window upper boundary of a dynamic time window according to the current period and the dynamic adjustment coefficient; And carrying out pulse judgment according to the relation between the arrival time of the Hall jump edge and the dynamic time window, triggering the increment of the turn number accumulation register when the Hall jump edge is judged to be effective pulse, shielding the pulse when the Hall jump edge is judged to be burr pulse, generating compensation pulse when the Hall jump edge is judged to be signal loss, and triggering the increment of the turn number accumulation register.
2. The method for calculating the turn number anti-interference of the BLDC motor based on the dynamic time window verification according to claim 1, wherein the calculation formula of the lower boundary of the window is that the lower boundary of the window=the current period× (1-dynamic adjustment coefficient), and the calculation formula of the upper boundary of the window is that the upper boundary of the window=the current period× (1+dynamic adjustment coefficient).
3. The anti-interference calculating method for the number of turns of the BLDC motor based on the dynamic time window verification according to claim 1, wherein the dynamic adjustment coefficient is adjusted in a stepping mode according to a speed interval in which the running rotating speed of the BLDC motor is located, the lower the rotating speed is, the larger the dynamic adjustment coefficient is, the higher the rotating speed is, the smaller the dynamic adjustment coefficient is, and the value range of the dynamic adjustment coefficient is 0.05 to 0.5.
4. The BLDC motor turn number anti-interference calculation method based on dynamic time window verification according to claim 1, wherein in the pulse discriminating step, parameters of the current period and the dynamic time window are updated only when the valid pulse is determined, parameters of the current period and the dynamic time window are kept unchanged and the pulse is masked when the glitch pulse is determined, and parameters of the current period and the dynamic time window are kept unchanged and the compensation pulse is generated when the signal is determined to be lost.
5. The method for calculating the turn number anti-interference of the BLDC motor based on the dynamic time window verification according to claim 1, wherein the edge detection is implemented by performing logical OR operation on each phase of the Hall sensor signal, and the pulse discrimination is triggered when any phase of the signal jumps.
6. The method for calculating the turn number anti-interference of the BLDC motor based on dynamic time window verification according to claim 1, further comprising an initialization stage, wherein the pulse discrimination is not performed in a first complete pulse period after the system is powered on or reset, and the first complete pulse period is taken as an initial value of the current period.
7. The method for calculating the turn number anti-interference of a BLDC motor based on dynamic time window verification according to claim 1, further comprising setting an upper threshold of a number of consecutive triggers of the compensation pulse, and determining that the BLDC motor is stopped and stopping generating the compensation pulse when the number of consecutively generated compensation pulses exceeds the upper threshold.
8. The method for calculating the turn number anti-interference of the BLDC motor based on the dynamic time window verification according to claim 1, wherein the method is realized based on an FPGA hardware parallel processing architecture, and the edge detection and the jitter elimination processing, the measurement of the current period, the calculation of the dynamic time window and the pulse discrimination are respectively executed in parallel by independent hardware logic units, wherein each hardware logic unit shares a system clock, and the frequency of the system clock is not lower than 50MHz.
9. BLDC motor number of turns anti-interference computing system based on dynamic time window verifies, characterized by comprising: the signal acquisition module is used for acquiring a Hall sensor signal of the BLDC motor, performing edge detection and jitter elimination processing, and generating a Hall jump edge; the time measurement module is used for measuring the time interval between two adjacent effective Hall jump edges based on a system clock to obtain the current period; the window calculation module is used for calculating a dynamic time window according to the current period and the dynamic adjustment coefficient; The judging logic module is used for judging the Hall jump edge as effective pulse, burr pulse or signal loss according to the relation between the arrival time of the Hall jump edge and the dynamic time window; a pulse compensation module for generating a compensation pulse when the signal loss is determined; and the counting accumulation module is used for triggering the increment of a turn accumulation register when the effective pulse is judged or the compensation pulse is generated.

Description

BLDC motor turn number anti-interference calculation method and system based on dynamic time window verification Technical Field The invention belongs to the technical field of motor control, and particularly relates to a BLDC motor turn number anti-interference calculation method and system based on dynamic time window verification, which are suitable for the fields of industrial control, servo systems and precise motion control with high requirements on the position accuracy of a brushless DC motor rotor. Background With the rapid development of industrial automation and intelligent manufacturing technologies, brushless direct current motors (BLDC motors) are widely used in the scenes of numerically controlled machine tools, industrial robots, precise positioning systems, and the like due to their high efficiency, long life and good control performance. In the above application, accurate calculation of the number of rotations of the motor is a fundamental precondition for achieving accurate positioning and motion control. Currently, the number of turns of the BLDC motor is counted mainly depending on pulse signals generated by the hall sensor. However, in a practical industrial application environment, there is usually strong electromagnetic interference around the motor, and these interference may cause burrs, jitter or loss of the hall sensor signal, which directly causes calculation errors of the turns. The existing anti-interference methods mainly comprise the following categories, but each has limitations of different degrees. The first is a hardware RC filtering method. Such methods suppress high frequency noise by adding an RC low pass filter circuit to the hall sensor signal line. However, the cut-off frequency of the RC filter is fixed, and cannot be adaptively adjusted according to the change of the motor rotation speed, so that normal signals may be filtered out during high-speed operation, and interference signals with lower frequency cannot be effectively filtered out during low-speed operation. The second is a software fixed threshold debounce method. The method sets a fixed time delay in the microcontroller to eliminate signal jitter. However, since the threshold is fixed, erroneous judgment is likely to occur in the motor acceleration and deceleration process, that is, legal pulses may be erroneously judged as interference due to shortened intervals, and interference pulses may be erroneously judged as effective signals due to increased intervals. In addition, the software-based jitter elimination method is limited by the processing speed of the microcontroller, and the time resolution is insufficient in a high-rotation-speed scene, so that the requirement of accurate counting is difficult to meet. The third class is the fixed time window method. The method sets a fixed time range as a judgment basis of pulse effectiveness. However, the fixed window cannot adapt to the variable speed working condition of the motor, and an effective compensation mechanism is lacked when the signal is completely lost, so that permanent deviation occurs in the accumulation of the turns. In summary, the prior art lacks a lap calculation scheme capable of adaptively adjusting the discrimination parameters according to the real-time rotation speed of the motor and simultaneously having perfect signal loss compensation capability. Disclosure of Invention The invention aims to provide a BLDC motor turn number anti-interference calculation method and system based on dynamic time window verification, which are used for solving the technical problems that the existing BLDC motor turn number calculation method is insufficient in anti-interference capability, lacks dynamic adaptability and has no effective compensation mechanism when signals are lost under strong electromagnetic interference environment and variable speed working conditions. In order to achieve the above object, the present invention provides a technical solution comprising: A BLDC motor turn number anti-interference calculation method based on dynamic time window verification comprises the following steps: collecting a Hall sensor signal of a BLDC motor, performing edge detection and jitter elimination processing, and generating a Hall jump edge; measuring the time interval between adjacent effective Hall jump edges based on a system clock to obtain a current period; calculating a window lower boundary and a window upper boundary of a dynamic time window according to the current period and the dynamic adjustment coefficient; And carrying out pulse judgment according to the relation between the arrival time of the Hall jump edge and the dynamic time window, triggering the increment of the turn number accumulation register when the Hall jump edge is judged to be effective pulse, shielding the pulse when the Hall jump edge is judged to be burr pulse, generating compensation pulse when the Hall jump edge is judged to be signal loss, and triggering the inc