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CN-122001259-A - Double-channel FXLMS-based beat frequency suppression method for electrolytic capacitor-free permanent magnet synchronous motor

CN122001259ACN 122001259 ACN122001259 ACN 122001259ACN-122001259-A

Abstract

The invention discloses a double-channel FXLMS-based beat frequency suppression method for a permanent magnet synchronous motor without electrolytic capacitors, which comprises the steps of extracting an alternating current component in direct current bus voltage as a reference signal, extracting an error signal from dq axis current, constructing an equivalent model of a secondary channel, carrying out pre-filtering treatment on the reference signal, constructing an objective function, carrying out weight self-adaptive iteration, carrying out online real-time iterative correction on the weight coefficient of an adaptive FIR filter, calculating by using the reference signal and the updated weight coefficient to obtain a corresponding beat frequency compensation voltage, and injecting feedforward of the corresponding beat frequency compensation voltage to an output end of a controller to realize beat frequency suppression. According to the method, the beat frequency related harmonic component in the dq axis current is used as an error signal, so that the self-adaptive adjustment of the beat frequency compensation voltage amplitude and the phase is realized, the beat frequency phenomenon caused by the busbar voltage fluctuation in the electrolytic capacitor-free system is effectively restrained, and the running stability and the control performance of the electrolytic capacitor-free permanent magnet synchronous motor driving system are improved.

Inventors

  • BAI CONG
  • QIN SHIPENG
  • YIN ZHONGGANG
  • WANG BO

Assignees

  • 西安理工大学

Dates

Publication Date
20260508
Application Date
20260107

Claims (8)

  1. 1. The electrolytic capacitor-free permanent magnet synchronous motor beat frequency suppression method based on the double-channel FXLMS is characterized by comprising the following steps of: Step 1, extracting DC bus voltage In (a) as a reference signal Extracting error signals from the d-axis current and the q-axis current And ; Step 2, constructing an equivalent model of the secondary path, and utilizing the equivalent model to reference signals Performing pre-filtering treatment; Step 3, constructing an objective function and executing weight self-adaptive iteration, and combining the error signals of the step 1 by utilizing FXLMS updating rule And And (2) on-line real-time iterative correction of the weight coefficient of the adaptive FIR filter with the filtering reference signal in the step (2); step 4, using the reference signal And calculating the updated weight coefficient to obtain a corresponding beat frequency compensation voltage, and injecting feedforward of the corresponding beat frequency compensation voltage to the output end of the current loop PI controller to realize beat frequency inhibition.
  2. 2. The method for suppressing beat frequency of the electrolytic capacitor-less permanent magnet synchronous motor based on the dual-channel FXLMS according to claim 1, wherein in the step 1, specifically: Step 1.1, collecting the DC bus voltage of an inverter in real time The direct current bus voltage is formed by superposing a constant direct current component and a fluctuation alternating current ripple component, as shown in formula (1): (1); Wherein, the Is the direct current component of the direct current bus voltage, For the angular frequency of the power grid, Is of frequency of Is used for the frequency conversion of the harmonic amplitudes of (a), Is of frequency of K is the order of the harmonics, k=1, 2,3,..n, t is the actual physical time; processing the collected DC bus voltage signal by a high-pass filter to remove DC component of bus voltage, extracting periodic AC ripple component caused by thin film capacitor with small capacitance, using bus voltage AC ripple component as reference signal of FXLMS algorithm As shown in formula (2): (2) Step 1.2, acquiring actual three-phase current of the motor driver through a sensor Electric angle of rotor Three-phase current Obtaining d-axis current through coordinate transformation And q-axis current As shown in formula (3): (3) Step 1.3, bandpass filtering the d-axis current and q-axis current signals by using a bandpass filter BPF to extract d-axis current Medium frequency is D-axis current harmonic component of (2) As a d-axis error signal Extracting q-axis current Medium frequency is As q-axis error signal As shown in the formula (4) and the formula (5): (4) (5)。
  3. 3. the method for suppressing beat frequency of the electrolytic capacitor-less permanent magnet synchronous motor based on the dual-channel FXLMS according to claim 2, wherein in the step 2, specifically: step 2.1, a voltage equation of the permanent magnet synchronous motor under the dq coordinate system is shown as a formula (6): (6) Wherein, the For the resistance of the stator, Respectively d-axis inductance and q-axis inductance In order to obtain the electric angular velocity, Is a permanent magnet flux linkage; The dq-axis voltage equation is decomposed into the sum of steady-state components and small-signal disturbance components, only small-signal terms related to beat frequency are reserved, and an approximate linear relation between the dq-axis voltage and current disturbance is obtained, as shown in a formula (7): (7) Wherein, the And Respectively representing dq axis voltage harmonic components generated by network side voltage fluctuation; And Respectively representing dq-axis current harmonic components generated by network side voltage fluctuation; continuous domain d-axis and q-axis secondary channel transfer function correction is shown in the following equations (10) and (11): (10) (11) Wherein, the The total delay of the control period of the system; The discretization estimation model of the secondary channels of the d axis and the q axis can be obtained after the transfer functions of the formula (10) and the formula (11) are transformed And As shown in the formula (12) and the formula (13): (12) (13) Step 2.2, reference signal is transmitted through the secondary channel Pre-filtering to obtain filtered signal And As shown in the formulas (14) and (15): (14) (15)。
  4. 4. the method for suppressing beat frequency of the electrolytic capacitor-less permanent magnet synchronous motor based on the dual-channel FXLMS according to claim 3, wherein in the step 3, specifically: Step 3.1, respectively establishing an L-order FIR filter with a transverse structure in the feed-forward channels of the d axis and the q axis, wherein the weight vector definition of the adaptive FIR filter on the d axis and the q axis is as shown in the formula (16) and the formula (17): (16) (17) step 3.2, the current error signal extracted according to step 1 And The filtered reference signal generated in step 2 And The two independent adaptive filter weights of the d-axis and q-axis are continuously adjusted using a gradient descent method to continuously track the output signal to the desired signal so that the objective function value is minimized.
  5. 5. The method for suppressing beat frequency of a capacitor less permanent magnet synchronous motor based on dual-channel FXLMS according to claim 4, wherein in said step 3.1, the filter order L is set to be 4-16.
  6. 6. The method for suppressing beat frequency of electrolytic capacitor-less permanent magnet synchronous motor based on dual-channel FXLMS according to claim 4, wherein in said step3.2, specifically Constructing an objective function of d-axis and q-axis And As shown in the formulas (18) and (19): (18) (19) The objective function deflects the weighting coefficients as shown in the formulas (20) and (21): (20) (21) under the condition of small step length, the model is used for replacing a real channel, as shown in the formulas (22) and (23): (22) (23) substituting the gradient into the gradient descent method, as shown in the formulas (24) and (25): (24) (25) An iterative formula of the weight vector is obtained, as shown in formula (26) and formula (27): (26) (27) Wherein, the And The d and q axis steps are respectively.
  7. 7. The method for suppressing beat frequency of a double-channel FXLMS-based permanent magnet synchronous motor with no electrolytic capacitor of claim 6, wherein in step 4, specifically: step 4.1, the original bus voltage ripple reference signal extracted in the step1 is processed Respectively inputting the compensation voltages to the d-axis and q-axis adaptive FIR filters to obtain corresponding compensation voltages of the d-axis and the q-axis, wherein the compensation voltages are shown in the formulas (28) and (29): (28) (29) Wherein, the Compensating the voltage component for the d-axis; Compensating the voltage component for the q-axis; And 4.2, directly adding the dq-axis beat frequency compensation voltage serving as a feedforward compensation term into a dq-axis original voltage command output by the current inner loop PI controller to form a final dq-axis voltage control command, wherein the final dq-axis voltage control command is shown in the formulas (30) and (31): (30) (31) Wherein, the And The dq axis reference voltage is output by the current PI controller; And Is a feedforward decoupling voltage; And Injecting a dq axis final voltage command after beat frequency compensation; Final voltage command of dq axis And The method comprises the steps of converting the back Park conversion into an alpha beta static coordinate system, inputting an alpha beta axis voltage command obtained through conversion into space vector pulse width modulation, combining direct current bus voltage acquired in real time, modulating and calculating three-phase bridge arm switching signals of an inverter, finally generating pulse signals required by the inverter, and driving a permanent magnet synchronous motor through a capacitor-free motor driver by PWM pulse signals.
  8. 8. The method for suppressing beat frequency of electrolytic capacitor-less permanent magnet synchronous motor based on dual-channel FXLMS according to claim 7, wherein in said step 4.2, beat frequency compensated is injected Shaft voltage command And Shaft voltage command As shown in formula (32): (32) Wherein, the Is the electrical angle of the motor.

Description

Double-channel FXLMS-based beat frequency suppression method for electrolytic capacitor-free permanent magnet synchronous motor Technical Field The invention belongs to the technical field of permanent magnet synchronous motor control, and particularly relates to a double-channel FXLMS-based beat frequency suppression method for a permanent magnet synchronous motor without electrolytic capacitors. Background Permanent magnet synchronous motors (PERMANENT MAGNET Synchronous Motor, PMSM) are widely used in the fields of industrial driving, new energy automobiles, robots and the like due to high efficiency, high power density and excellent dynamic performance. The electrolytic capacitor-free permanent magnet synchronous motor driving system adopts an electrolytic capacitor-free inverter topological structure. The topology structure uses a thin film capacitor of tens of microfarads to replace a large capacitance electrolytic capacitor in a direct current bus, and removes a power factor correction (Power Factor Correction, PFC) circuit. Compared with the traditional electrolytic capacitor motor driving system, the thin film capacitor has smaller volume and weight, longer service life, smaller influence by the ambient temperature and higher reliability. And after the PFC circuit is removed, the system cost is reduced, and the system power density is improved. However, the energy storage capability of the film capacitor is weak, so that the bus voltage is difficult to maintain constant, and the bus voltage fluctuates, so that the bus voltage finally contains both a direct current component and a fluctuation component. When the rectifying circuit is a three-phase uncontrolled bridge rectifying circuit, the frequency of the busbar voltage fluctuation component is 6 times of the frequency of the power grid. After the voltage ripple is modulated by the inverter and injected into the permanent magnet synchronous motor, harmonic waves related to fluctuation components are generated, and the harmonic waves interact with fundamental waves of the output voltage of the inverter, so that low-frequency oscillation, namely beat frequency phenomenon, is generated on the phase voltage output by the inverter. The amplitude envelope of the low frequency is fluctuated, so that serious heating phenomenon and noise are generated, and even the system cannot normally operate when serious heating phenomenon and noise are generated. At present, beat frequency phenomenon suppression methods in an electrolytic capacitor-free system can be mainly divided into two types, namely hardware compensation and software algorithm compensation. The hardware compensation mainly uses a hardware filter to filter out the fluctuation component in the bus voltage, thereby maintaining the constant bus voltage. This approach, while effective, adds significant hardware cost, bulk and weight to the system, contrary to the original goal of electroless capacitance systems for high power density and low cost. The software compensation scheme for suppressing beat frequency phenomenon mainly comprises frequency compensation, feedback regulation, single-period control and feedforward compensation technology. Although the frequency compensation technology can inhibit low-frequency harmonic waves of specific frequency, high-frequency harmonic interference which cannot be ignored is easily introduced under a high-rotating-speed working condition, the feedback regulation technology can eliminate errors through closed loops, has extremely high requirements on loop bandwidth, usually needs to introduce a complex current tracker or add an additional regulator, so that system parameter regulation is difficult and difficult to widely apply, the single-period control technology can maintain the volt-second balance of output voltage, but algorithm implementation is highly dependent on accurate prediction of bus voltage fluctuation frequency, amplitude and initial phase, robustness is poor under dynamic working conditions of severe changes of rotating speed and load, and the feedforward compensation method is easy to realize, but is limited by direct-current bus sampling precision and one-beat advance effect of pulse width modulation, real-time performance is poor, and a linear observer or a repeated predictor introduced for improving prediction precision often has the problems of complex structure, high digital realization difficulty or weak dynamic regulation capability and the like. Disclosure of Invention The invention aims to provide a double-channel FXLMS-based beat frequency suppression method for a permanent magnet synchronous motor without electrolytic capacitors, which can better reduce harmonic waves caused by voltage fluctuation of a network side direct current bus, thereby suppressing the beat frequency phenomenon. The technical scheme adopted by the invention is that the beat frequency suppression method of the electrolytic capacitor-free permanent magnet synchron