CN-122001263-A - Pulse width modulated signal generator and method

Abstract

A semiconductor device for generating a PWM modulated signal (e.g., an optimized pulse pattern OPP) is provided. The ADC 42 outputs the angle of the motor and is connected to a co-processor 52, for example a digital signal processor DSP. The co-processor 52 has an observer 44 connected to the angle input for generating the motor angle and a look-up table 48 for generating the PWM signal as a direct function of the generated motor angle. The PWM signal is output to the timer unit 50. The computing unit 46 has an input connected to the co-processor 52, and is arranged to select a look-up table based on the generated motor angle and to store the selected look-up table as the look-up table 48.

Inventors

• M. Jeffremov
• J. SCHAEFER
• A. Trending
• SCHEIBERT KLAUS
• A. Fulunda
• M. Augustine

Assignees

• 英飞凌科技股份有限公司

Dates

Publication Date

20260508

Application Date

20251105

Priority Date

20241106

Claims (17)

1. 1. A semiconductor device for generating a pulse mode signal, comprising: an analog-to-digital converter ADC for connection to the motor, having an output for indicating the angle of the motor, A co-processor having an angle input connected to the output of the ADC, an observer connected to the angle input for determining the angle of the motor, a co-processor look-up table for generating a pulse mode signal as a direct function of the determined angle of the motor, and a pulse mode signal output for outputting the pulse mode signal, an A computing unit having an input connected to the co-processor, the computing unit being arranged to select a look-up table from a plurality of look-up tables based on the determined motor conditions, such as acceleration and torque for example, and to store the selected look-up table as a co-processor look-up table in the co-processor.
2. 2. The semiconductor device of claim 1, further comprising A memory storing a plurality of look-up tables, and A direct memory access Device (DMA) unit for directly loading the lookup table selected by the computing unit into the coprocessor as a coprocessor lookup table.
3. 3. The semiconductor device according to claim 1 or 2, Wherein the observer comprises a loop output connected to the computing unit and is arranged to: further determining a motor speed; outputting the determined motor speed and the determined motor angle to a computing unit via a loop output, and Outputting the angle to a look-up table; wherein the calculation unit is arranged to select the look-up table based on the determined motor angle and the determined motor speed.
4. 4. A semiconductor device according to any preceding claim, wherein The look-up table is arranged to generate the pulse mode signal at a first rate, an The calculation unit is arranged to select the pulse mode signal at a second rate, wherein the second rate is at least one fifth of the first rate.
5. 5. The semiconductor device of any preceding claim, further comprising: a timer unit connected to the pulse mode signal output of the coprocessor, the timer unit having: input connected to pulse mode signal output of coprocessor, and Positive side output and negative side output for outputting high side and low side pulsed mode signals for driving the half bridge.
6. 6. The semiconductor device according to claim 5, for driving an inverter for a three-phase motor, the inverter having three half-bridges, the timer unit comprising three output pairs for driving the respective half-bridges, each output pair comprising a positive side output and a negative side output.
7. 7. The semiconductor device of claim 5, comprising: Three parallel look-up tables, each for generating a respective PWM signal as a direct function of the generated motor angle, and Three parallel pulse mode signal outputs for outputting the pulse mode signals to the corresponding timer units.
8. 8. The semiconductor device according to claim 6 or 7, wherein the semiconductor device further comprises: a sample time service request link from the coprocessor to the timer unit; whereby the co-processor is arranged to generate a plurality of pulse mode signals for sequentially outputting the plurality of pulse mode signals on the pulse mode signal output and for outputting a signal on the sample time service request link for signaling the timer unit when the pulse mode output signal is available on the pulse mode signal output.
9. 9. The semiconductor device according to claim 8, wherein the timer unit includes: A sampling unit having an input connected to the pulse mode output of the coprocessor for sampling the pulse mode signal on the pulse mode signal output when indicated on the sample time service request link, and Dead time and inversion unit comprising a sampling input connected to the output of the sampling unit, and further comprising a positive side output unit and a negative side output unit, for each output pair, the dead time and inversion unit being arranged to generate high side and low side pulsed mode signals on the positive side output unit and the negative side output unit, respectively, from the signal on the sampling signal input.
10. 10. The semiconductor device according to claim 8 or 9, further comprising A synchronous service request link from the ADC to the timer unit for signaling the presence of new digitized data captured by the ADC.
11. 11. A system, comprising: A semiconductor device according to any preceding claim, and At least one half bridge, each half bridge comprising a high side transistor connected to the positive side output of the semiconductor device and a low side transistor connected to the low side output of the semiconductor device.
12. 12. A method of generating a pulse mode signal, comprising: a signal representing the angle of the motor is digitized, Determining a motor angle from the digitized signal using an observer; Generating a pulse mode signal as a direct function of the angle of the generated motor using a lookup table, and outputting the pulse mode signal, and A lookup table is selected in the calculation unit based on the determined motor conditions, such as acceleration and torque, for example, and the selected lookup table is stored as a lookup table.
13. 13. The method of claim 12, further comprising generating a motor speed using an observer and outputting the motor speed to a computing unit.
14. 14. The method of claim 12 or 13, further comprising: A high-side signal and a low-side signal for driving the half bridge are generated from the pulse mode signal, and the half bridge is driven with the high-side signal and the low-side signal.
15. 15. A method according to claim 12, 13 or 14 for driving an inverter for a three-phase motor, the inverter having three half-bridges, the method comprising: three look-up tables are used to generate three respective pulse mode signals, each as a direct function of the generated motor angle, and to output the pulse mode signals.
16. 16. The method of claim 15, further comprising sequentially outputting a plurality of PWM signals on the pulse mode signal output and outputting a signal on the sample time service request link to signal when the pulse mode output signal is available on the pulse mode signal output.
17. 17. The method of any one of claims 12 to 16, comprising Generating a pulse mode signal at a first rate, an The pulse mode signal is selected at a second rate, where the second rate is at least one fifth of the first rate.

Description

Pulse width modulated signal generator and method Technical Field The present invention relates to a method of generating a pulse width modulated signal and to a semiconductor device for generating the signal, in particular for driving a motor. Background It is necessary to drive the motor effectively. For example, in a powertrain (powertrain) of an electric or hybrid vehicle, an electric motor is driven from a battery by a plurality of drives. Typically, six power transistors arranged in three half-bridges are used to drive a three-phase motor. The power transistor is driven by a signal, typically a pulse width modulated signal, i.e. the transistor is either turned off or on. The power transistor is driven by a driver controlled by a control unit (e.g. a microcontroller) that generates the signal. One method is known as space vector pulse width modulation, PWM. When this approach is used, the higher switching frequency allows for the generation of PWM signals with reduced ripple and lower harmonic distortion, which allows for lower losses in the motor. There is a general need for a method of avoiding excessive losses in an electric machine. Disclosure of Invention According to a first example, there is provided a semiconductor device for generating a pulse mode signal, comprising: An analog-to-digital converter, ADC, for connection to a motor, having an output for indicating the angle of the motor, A co-processor having an angle input connected to the output of the ADC, an observer connected to the angle input for determining the motor angle, a co-processor look-up table for generating PWM pulse mode signals as a direct function of the determined motor angle, and a pulse mode signal output for outputting pulse mode signals, an A computing unit having an input connected to the co-processor, the computing unit being arranged to select a look-up table from a plurality of look-up tables based on the determined motor conditions, such as acceleration and torque for example, and to store the selected look-up table as a co-processor look-up table in the co-processor. By using a look-up table in the co-processor, this example provides a first loop driven directly from the angle measurement, which can provide a fast loop without requiring complex structures in the semiconductor device. By generating the pulse mode signal directly from the analog to digital converter ADC output, the pulse mode signal can be delivered as fast as the ADC is capable of delivering a signal. Thus, the ADC and DSP provide fast loops, and the updating of the look-up table by the computing unit constitutes a second, slower outer loop. For example, the fast loop may operate on a time frame of less than 10 μs, e.g. less than 2 μs, while the outer loop comprising the calculation unit may operate on a time frame of more than 20 μs, e.g. more than 40 μs. This in turn allows the use of conventional microcontroller general-purpose cores to pass computations in the outer loop, alternative embodiments may use alternative hardware, such as alternative cores, for example in parallel processing units. Drawings Examples of the invention will now be described, purely by way of example, with reference to the accompanying drawings, in which: FIG. 1 shows an optimized pulse pattern (A) and a regular pulse pattern (B); fig. 2 shows the drive signals of the driver together with the driver; FIG. 3 illustrates an example arrangement; FIG. 4 illustrates a further example arrangement; Fig. 5 shows PWM signals; fig. 6 shows a drive signal; FIG. 7 shows a further example arrangement, and Fig. 8 shows signals corresponding to the arrangement of fig. 7. Detailed Description Examples of the present invention will be presented purely by way of example. Fig. 1 shows an example of an optimized pulse pattern (a) and a regular pulse pattern (B) for driving a motor. The regular pulse pattern (B) starts pulses at regular intervals and adjusts the length of the pulses to provide Pulse Width Modulation (PWM). The optimized pulse mode OPP can be used to deliver signals with lower total harmonic distortion THD compared to space vector pulse width modulation. In this optimization mode, the switches are not limited to regular time intervals, but rather to times selected for lower THD and loss. For example, an OPP using a switching frequency of 9 kHz may be able to provide a THD of 2.3%. In contrast, the SVPWM method with the same switching frequency of 9 kHz can provide a current signal with a THD of 5.7%. In order for the SVPWM method to achieve a similar THD of 2.35%, the switching frequency needs to be increased to 20kHz. This higher switching frequency means that the transistors in the half-bridge of the drive motor switch more often, resulting in higher switching losses. Thus, the use of OPP can significantly improve efficiency and thereby reduce losses, which in turn cause lower heating, making it easier to keep the semiconductors and motor within the correct temperature rang