CN-122001307-A - Digital predistortion

Abstract

The present disclosure relates to digital predistortion. An apparatus for digitally pre-distorting a real value signal in a real domain, but not in a complex domain, to produce a pre-distorted real value signal, wherein digital pre-distortion is performed based on a comparison between a feedback real value signal, a real value signal to be transmitted, and/or a pre-distorted version of the signal.

Inventors

• T. Stedeli Ribeiro
• B. Jeronek
• T. Fergentfer

Assignees

• 诺基亚通信公司

Dates

Publication Date

20260508

Application Date

20251106

Priority Date

20241108

Claims (14)

1. 1. An apparatus for digitally predistorting DPD comprising: digital signal processor circuitry (112) including DPD circuitry; A power amplifier (60); At least one processor (402), and At least one memory (404) comprising instructions that, when executed by the at least one processor, cause the apparatus at least to: -determining a predistortion real value signal (30), wherein the determining of the predistortion real value signal (30) comprises: (i) -applying DPD (20) in the real domain on a real valued input signal (121) to obtain said predistortion real valued signal (30) to be sent to said power amplifier; (ii) -measuring an output of said power amplifier representing a distorted real signal (61); (iii) Determining an error based on the distorted real value signal (61), and at least one of a) the real value input signal (121), b) the pre-distorted real value signal (30); (iv) Based on the determined error, the DPD is altered in the real domain.
2. 2. The apparatus of claim 1, wherein the pre-distorted real valued signal is transmitted over a first bandwidth of transmission frequencies, and wherein the digital signal processor circuitry for DPD of the real valued signal in the real domain is configured to adjust real valued signals for transmission over at least frequencies outside the first bandwidth that have the ability to produce effects within the first bandwidth.
3. 3. The apparatus of claim 1, wherein the real-valued signal is a time-varying real-valued signal, and the real-valued signal has a bandwidth from zero frequency (DC) to half of a sampling frequency.
4. 4. The apparatus of claim 1, wherein the predistortion real valued signal is provided as a controlled waveform as a real valued signal directly from a digital signal processing block to a digital to analog converter (DAC) at a target frequency.
5. 5. The apparatus of claim 1, wherein the pre-distorted real-valued signal is provided directly from a digital signal processor block to a digital-to-analog converter (DAC), bypassing up-sampling and up-conversion blocks for complex-valued signals.
6. 6. The apparatus of claim 1, wherein the predistortion real signal is configured to cancel at least one of i) even order distortion, ii) odd order distortion at a power amplifier for a transmit frequency to linearize an output of the power amplifier at the transmit frequency.
7. 7. The apparatus of claim 1, wherein the DPD adjusts coefficients of a model used to generate distortion components having an amplitude and phase that can cancel distortion generated by a power amplifier.
8. 8. The apparatus of claim 1, wherein the pre-distorted real-valued signal is transmitted over a first bandwidth of transmission frequencies, the digital signal processor circuitry for DPD in the real domain being configured to adjust signal transmission over at least a frequency of a transmitted carrier below a lowest frequency or a frequency of a transmitted carrier above a highest frequency.
9. 9. The apparatus of claim 1, comprising an input path for the predistortion real signal to a power amplifier, wherein the input path is configured to have a bandwidth substantially exceeding a transmission bandwidth.
10. 10. The apparatus of claim 9, wherein the input path is configured to have a bandwidth that is extended significantly beyond the transmission bandwidth at frequencies below the transmission bandwidth.
11. 11. The apparatus of claim 10, wherein the input path is configured to have a bandwidth that is extended to include DC.
12. 12. The apparatus of any one of claims 1 to 11, comprising a matching network configured to allow low frequencies to reach a gate node of the power amplifier transistor.
13. 13. The apparatus of any one of claims 1 to 11, comprising a transistor bias circuit configured to allow low frequencies from a power amplifier input to reach a gate node of the power amplifier transistor.
14. 14. A method for digitally predistorting DPD comprising: Determining a predistortion real value signal 30, wherein the determining of the predistortion real value signal (30) comprises: -applying DPD (20) in the real domain on a real valued input signal (121) to obtain said predistortion real valued signal (30) to be sent to said power amplifier; -measuring an output of said power amplifier representing a distorted real signal (61); Determining an error based on the distorted real value signal (61), and at least one of a) the real value input signal (121), b) the pre-distorted real value signal (30); based on the determined error, the DPD is altered in the real domain.

Description

Digital predistortion Technical Field Examples of the present disclosure relate to Digital Predistortion (DPD). Examples of the present disclosure relate to Digital Predistortion (DPD) prior to power amplification. Background The Power Amplifier (PA) is efficient at non-linear operating points. It is desirable to linearize the PA outputs so that they operate efficiently while meeting linearity specifications. One way to achieve linearization of the PA output is by pre-distorting the input signal of the PA such that the signal output from the PA meets a specified linearity. For example, predistortion may produce a signal distortion component with controlled (frequency dependent) amplitude and phase that is a complement to the signal distortion inherent at the PA. The objective is that the distortion at the PA counteracts the introduced distortion, resulting in a near linear transfer characteristic. Disclosure of Invention The scope of protection sought for the various exemplary embodiments of the present invention is defined by the independent claims. The example embodiments and features (if any) described in this specification that do not fall within the scope of the independent claims are to be construed as examples of various example embodiments that facilitate an understanding of the invention. According to various, but not necessarily all, examples, an apparatus is provided. The apparatus may include digital signal processor circuitry including DPD circuitry, a power amplifier, at least one processor, and at least one memory including instructions that when executed by the at least one processor, cause the apparatus at least to determine a predistortion real value signal, wherein the determination of the predistortion real value signal includes applying digital predistortion to a real value input signal in a real domain to obtain the predistortion real value signal to be sent to the power amplifier, measuring an output of the power amplifier representative of the distortion real value signal, determining an error based on the distortion real value signal, and at least one of a) the real value input signal, b) the predistortion real value signal, and modifying the digital predistortion in the real domain based on the determined error. In various, but not necessarily all, examples, the predistortion real valued signal is transmitted over a first bandwidth of a transmission frequency. And wherein the digital predistortion of the real signal in the real domain is configured to adapt the real signal for transmission at least on frequencies outside the first bandwidth having the ability to produce effects within the first bandwidth. In some, but not necessarily all, examples, the real-valued signal is a time-varying real-valued signal, and the real-valued signal has a bandwidth from zero frequency (DC) to half the sampling frequency. In some, but not necessarily all, examples, the predistortion real value signal is provided as a controlled waveform as a real value signal directly from the digital signal processing block to a digital to analog converter (DAC) at the target frequency. In some, but not necessarily all, examples, the pre-distorted real-valued signal is provided directly from the digital signal processor block to a digital-to-analog converter (DAC), bypassing the up-sampling and up-conversion block for the complex-valued signal. In some, but not necessarily all, examples, the predistortion real valued signal is configured to cancel even order distortion at the power amplifier for the transmit frequency to linearize the output of the power amplifier at the transmit frequency. In some, but not necessarily all, examples, the predistortion real valued signal is configured to cancel even order distortion and odd order distortion at the power amplifier for the transmit frequency to linearize the output of the power amplifier at the transmit frequency. In some, but not necessarily all, examples, the predistortion real signal is configured to cancel odd order distortion at the power amplifier for a transmit frequency to linearize the output of the power amplifier at the transmit frequency. In some, but not necessarily all, examples, the digital predistortion adjusts coefficients of a model used to generate a distortion component having an amplitude and phase capable of canceling distortion generated by the power amplifier. In some, but not necessarily all, examples, the predistortion real valued signal is transmitted over a first bandwidth of a transmission frequency and the digital predistortion in the real domain is configured to additionally adjust the signal to be transmitted over at least a frequency of the transmitted carrier below the lowest frequency or a frequency of the transmitted carrier above the highest frequency. In some, but not necessarily all, examples, the apparatus includes an input path for predistorting a real-valued signal to a power amplifier, wherein the input path is configured t