CN-122001310-A - High-gain broadband low-noise amplifier with high linearity range

CN122001310ACN 122001310 ACN122001310 ACN 122001310ACN-122001310-A

Abstract

The embodiment of the application provides a high-gain broadband low-noise amplifier with a high linear range. The method is applied to the radio frequency integrated circuit technology and comprises a first-stage amplifying circuit, a second-stage amplifying circuit and a matching network, wherein the first-stage amplifying circuit and the second-stage amplifying circuit are connected through the matching network, the first-stage amplifying circuit adopts a single-tube-formed common-source common-gate structure and is used for carrying out first-stage amplifying on an input signal, the second-stage amplifying circuit adopts a composite-tube-formed common-source common-gate structure and is used for carrying out second-stage amplifying on the input signal, and the matching network is used for receiving an output signal of the first-stage amplifying circuit and inputting the output signal of the first-stage amplifying circuit into the second-stage amplifying circuit. The design meets the requirements of high gain, low noise and high linearity.

Inventors

PU JUNLIN
PU YAN

Assignees

中国电子科技集团公司第二十四研究所

Dates

Publication Date: 20260508
Application Date: 20260122

Claims (7)

1. The high-gain broadband low-noise amplifier with the high linearity range is characterized by comprising a first-stage amplifying circuit, a second-stage amplifying circuit and a matching network, wherein the first-stage amplifying circuit and the second-stage amplifying circuit are connected through the matching network; The first-stage amplifying circuit adopts a single-tube-formed cascode structure and is used for carrying out first-stage amplification on an input signal; The second-stage amplifying circuit adopts a cascade structure formed by composite pipes, and is used for carrying out second-stage amplification on input signals; The matching network is used for receiving the output signal of the first-stage amplifying circuit and inputting the output signal of the first-stage amplifying circuit into the second-stage amplifying circuit.
2. The method of claim 1, wherein the first stage amplification circuit comprises: The first transistor, the third transistor, the first resistor, the thirteenth resistor, the first inductor, the third inductor, the first capacitor and the fifth capacitor; the first transistor and the second transistor are connected in series to form a cascode structure, the first resistor, the second resistor, the third resistor, the fourth resistor and the third transistor form an active bias network, the eighth resistor and the third capacitor form a power supply filter network, and the fifth resistor and the first capacitor form a feedback network.
3. The method of claim 2, wherein the drain of the first transistor is connected to a gain boosting network, the gain boosting network comprising a sixth resistor, a ninth resistor, a second capacitor, a second inductor, and a third inductor, wherein the second inductor and the third inductor are connected in series, the ninth resistor and the third inductor are connected in parallel, the second capacitor and the sixth resistor are connected in series, one end of the sixth resistor is connected to one end of the second inductor, one end of the second capacitor is grounded, and one end of the third inductor is connected to the drain of the first transistor.
4. The method of claim 2, wherein the input of the first stage amplifying circuit is connected in series with a first inductor, a tenth resistor is connected in parallel with a fifth capacitor, a first end of the tenth resistor is connected to the source of the second transistor, and a second end of the tenth resistor is grounded.
5. The method of claim 1, wherein the second stage amplifying circuit comprises a fourteenth resistor, a twenty third resistor, a sixth capacitor, a ninth capacitor, a fourth transistor, and a sixth transistor, wherein the fifth transistor and the sixth transistor are connected in series to form a composite amplifying tube, and the composite amplifying tube and the fourth transistor are connected in series to form a cascode structure.
6. The method of claim 5, wherein a source of the sixth transistor is connected to one end of an eighth capacitor, another end of the eighth capacitor is grounded, and a drain of the fourth transistor is connected to a fourth inductor.
7. The method of claim 1, wherein the matching network consists of only capacitance and resistance.

Description

High-gain broadband low-noise amplifier with high linearity range Technical Field The application relates to the technical field of radio frequency integrated circuits, in particular to a high-gain broadband low-noise amplifier with a high linear range. Background In the field of radio frequency integrated circuits, a radio frequency low noise amplifier is an important circuit component. Conventional rf amplifiers are typically implemented using common-source, current-multiplexed, common-source common-gate structures. The low noise amplifier with a common single structure has a simpler structure, but when the requirements of a communication system with higher requirements on noise, gain and linearity are met, the following defects often exist: The low noise amplifier of the traditional GaAs process generally needs to increase the transistor size when the output power is increased, but the parasitic capacitance is increased rapidly, the high frequency gain and efficiency are affected, the bandwidth and the linearity are difficult to be compatible, the realization of the broadband high linearity amplifier is limited, the matching network of the traditional broadband amplifier generally depends on a lossy network or transformer coupling, but the noise coefficient and the output power are deteriorated, and the broadband matching is difficult to maintain the high linearity in the broadband range while guaranteeing the low noise. The traditional low-noise amplifier needs to sacrifice noise performance in order to improve linearity and output power, and the low-noise amplifier can optimize noise coefficient, but the output power and linearity of the low-noise amplifier are often insufficient. Under ultra-wideband conditions, it is difficult for the prior art to co-optimize low noise, high gain, and high linearity characteristics in the same circuit. Disclosure of Invention The application provides a high-gain broadband low-noise amplifier with a high linearity range, which is used for solving the problem that the linearity, noise coefficient and output power are difficult to realize collaborative optimization in the design of the existing gallium arsenide radio frequency low-noise amplifier. The high gain broadband low noise amplifier with high linearity range includes: The first-stage amplifier is connected with the second-stage amplifier through the matching network; The first-stage amplifying circuit adopts a single-tube-formed cascode structure and is used for carrying out first-stage amplification on an input signal; The second-stage amplifying circuit adopts a cascade structure formed by composite pipes, and is used for carrying out second-stage amplification on input signals; The matching network is used for receiving the output signal of the first-stage amplifying circuit and inputting the output signal of the first-stage amplifying circuit into the second-stage amplifying circuit. Optionally, the first stage amplifying circuit includes: The first transistor, the third transistor, the first resistor, the thirteenth resistor, the first inductor, the third inductor, the first capacitor and the fifth capacitor; the first transistor and the second transistor are connected in series to form a cascode structure, the first resistor, the second resistor, the third resistor, the fourth resistor and the third transistor form an active bias network, the eighth resistor and the third capacitor form a power supply filter network, and the fifth resistor and the first capacitor form a feedback network. Optionally, the drain electrode of the first transistor is connected to a gain boosting network, the gain boosting network includes a sixth resistor, a ninth resistor, a second capacitor, a second inductor and a third inductor, where the second inductor and the third inductor are connected in series, the ninth resistor and the third inductor are connected in parallel, the second capacitor and the sixth resistor are connected in series, one end of the sixth resistor is connected to one end of the second inductor, one end of the second capacitor is grounded, and one end of the third inductor is connected to the drain electrode of the first transistor. Optionally, the input end of the first-stage amplifying circuit is connected in series with the first inductor, the tenth resistor is connected in parallel with the fifth capacitor, the first end of the tenth resistor is connected with the source electrode of the second transistor, and the second end of the tenth resistor is grounded. Optionally, the second-stage amplifying circuit comprises fourteenth to twenty-third resistors, sixth to ninth capacitors and fourth to sixth transistors, wherein the fifth and sixth transistors are connected in series to form a composite amplifying tube, and the composite amplifying tube and the fourth transistor are connected in series to form a cascode structure. Optionally, a source of the sixth transistor is connected to one end of the eighth