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CN-122001353-A - Power-on reset circuit and chip

CN122001353ACN 122001353 ACN122001353 ACN 122001353ACN-122001353-A

Abstract

The invention discloses a power-on reset circuit and a chip, the power-on reset circuit comprises a reference voltage module, a comparison module and a logic operation module. The reference voltage module is used for generating a reference voltage based on a power supply voltage and a characterization signal for characterizing whether the reference voltage is generated or not. The comparison module is used for comparing the reference voltage with the power supply voltage to generate a comparison signal. The logic operation module is used for carrying out logic operation on the characterization signal and the comparison signal to generate a reset signal. According to the power-on reset circuit and the chip, the reference voltage module is used for generating accurate reference voltage, the comparison module is used for comparing the reference voltage with the power voltage to obtain the comparison signal, and finally the logic operation module is used for comprehensively representing the signal and the comparison signal to generate the reset signal, so that the reset signal is prevented from being released by mistake before the reference voltage is unstable. The circuit can realize a power-on reset detection function with good precision by using extremely low static power consumption under extremely low power supply voltage.

Inventors

  • WEI FENG

Assignees

  • 芯弦半导体(苏州)有限公司

Dates

Publication Date
20260508
Application Date
20260123

Claims (10)

  1. 1. A power-on reset circuit, comprising: a reference voltage module for generating a reference voltage based on a supply voltage and a characterization signal characterizing whether the reference voltage has been generated; the comparison module is used for comparing the reference voltage with the power supply voltage to generate a comparison signal; and the logic operation module is used for carrying out logic operation on the characterization signal and the comparison signal to generate a reset signal.
  2. 2. The power-on reset circuit of claim 1, wherein the reference voltage module comprises a start-up unit and a voltage generation unit connected to each other, the start-up unit is configured to generate a start-up signal based on power-on of a power supply voltage, the voltage generation unit is configured to start up and generate a reference voltage and a shut-down signal based on control of the start-up signal, and the start-up unit is configured to shut down the start-up signal and generate a characterization signal based on the shut-down signal.
  3. 3. The power-on reset circuit of claim 2, wherein the voltage generation unit comprises a current mirror unit, a first transistor, a second transistor, a first resistor and a second resistor, the current mirror unit comprises a first current branch and a second current branch with current proportionality, the first end of the first transistor and the first end of the second transistor are connected with a ground voltage, the control end of the first transistor and the second end of the second transistor are connected with the first end of the first resistor, the control end of the second transistor and the second end of the first resistor are connected with the first end of the second resistor, the second end of the first transistor is connected with the first current branch of the current mirror unit, and the second end of the second resistor is connected with the second current branch of the current mirror unit to generate a reference voltage; The current mirror unit is connected with the starting unit to start based on control of a starting signal, and the control end of the first transistor is further used for generating a closing signal.
  4. 4. A power-on reset circuit as claimed in claim 3, wherein the current mirror unit comprises a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a third resistor, the first terminal of the third transistor, the first terminal of the fourth transistor being connected to the power supply voltage, the second terminal of the third transistor being connected to the first terminal of the fifth transistor, the second terminal of the fourth transistor being connected to the first terminal of the sixth transistor, the control terminal of the third transistor, the control terminal of the fourth transistor, the second terminal of the fifth transistor being connected to the start-up unit for receiving the start-up signal, the first terminal of the third resistor being connected to the second terminal of the fifth transistor, the control terminal of the sixth transistor, the second terminal of the third resistor being connected to the second terminal of the first transistor, the second terminal of the sixth transistor being connected to the second terminal of the second resistor.
  5. 5. A power-on reset circuit as claimed in claim 3, wherein the channel length of the first transistor is equal to the channel length of the second transistor.
  6. 6. The power-on reset circuit of claim 2, wherein the start-up unit comprises a seventh transistor, an eighth transistor and a fourth resistor, the first terminal of the seventh transistor, the first terminal of the eighth transistor being connected to the ground voltage, the control terminal of the seventh transistor being connected to the voltage generation unit to receive the off signal, the second terminal of the seventh transistor being connected to the first terminal of the fourth resistor and the control terminal of the eighth transistor to generate the characterization signal, the second terminal of the fourth resistor being connected to the power supply voltage, the second terminal of the eighth transistor being connected to the voltage generation unit to generate the start-up signal.
  7. 7. The power-on reset circuit of claim 1, wherein the comparison module comprises a comparison unit and a voltage dividing unit, the voltage dividing unit is connected with the power supply voltage to divide the power supply voltage to generate a divided voltage, and the comparison unit is connected with the reference voltage module and the voltage dividing unit to compare the reference voltage and the divided voltage to generate the comparison signal.
  8. 8. The power-on reset circuit of claim 7, wherein the voltage dividing unit comprises a voltage dividing subunit, a switch subunit and a resistor subunit, the first end of the voltage dividing subunit is connected with the power supply voltage, the second end of the voltage dividing subunit is connected with the first end of the resistor subunit and the first end of the switch subunit, the second end of the resistor subunit and the second end of the switch subunit are connected with the ground voltage, the voltage dividing node of the voltage dividing subunit is used for generating the divided voltage, and the switch subunit is further connected with the comparison unit and turned on or turned off based on the comparison signal to adjust the voltage dividing ratio of the divided voltage to the voltage power supply.
  9. 9. The power-on reset circuit of claim 1, wherein the logic operation module comprises an or gate, a first input of the or gate is connected to the reference voltage module to receive the characterization signal, a second input of the or gate is connected to the comparison module to receive the comparison signal, and an output of the or gate is used to generate the reset signal.
  10. 10. A chip comprising the power-on reset circuit of any one of claims 1-9.

Description

Power-on reset circuit and chip Technical Field The invention belongs to the technical field of integrated circuits, and particularly relates to a power-on reset circuit and a chip. Background With the continuous evolution of the high-power application scenes such as artificial intelligence, automatic driving, big data processing and the like, such as the landing and the integrated circuit manufacturing process, the working voltages of chips such as modern Central Processing Units (CPUs), graphic Processing Units (GPUs), neural Network Processors (NPUs) and the like are in a continuous decreasing trend. The chip integration level is greatly improved along with the functional complexity, and the power consumption of the transistor can be effectively reduced by adopting lower voltage power supply, and the heat dissipation pressure of the chip is relieved. At present, the digital integrated circuit generally works below 1V, and in partial low-power consumption scenes, the working voltage is even as low as 0.8V-0.9V. In the process of powering up the power supply voltage of the digital integrated circuit from 0V to rated working voltage, a power-on reset (POR) circuit is required to provide stable and reliable reset signals, namely, when the power supply voltage is low, the global reset state of the chip is kept, all the sequential units such as latches, triggers and the like in the chip are stably in a determined initial state, the chip is ensured to be started in a controllable determined state and execute a subsequent working flow, and when the power supply voltage is risen to a reset threshold value which allows the reset to be released, the reset signals are required to be accurately released, so that all the modules of the chip are orderly started from the initial state and enter the normal working flow. If a reliable POR circuit is lacking, the states of the modules are in random uncertain states after the chip is electrified, logic disorder and abnormal functions are easily caused, even the chip cannot be started to fail, and the stability and the reliability of the whole electronic system are seriously affected. The power-on reset circuit of the existing mainstream generally adopts a mode of comparing a power supply voltage with a reference voltage or triggering a threshold detection circuit by the power supply voltage in the rising process to generate a reset signal, but the modes generally have the problems of unstable reset signal, insufficient control precision of the reset threshold and the like caused by the response speed difference of the circuit. The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person of ordinary skill in the art. Disclosure of Invention The invention aims to provide a power-on reset circuit and a chip, which can realize higher-precision power-on reset logic control under the condition of extremely low power supply voltage and can avoid the problem of generating an error reset signal at the beginning of power-on. In order to achieve the above object, a specific embodiment of the present invention provides the following technical solution: A power-on reset circuit comprises a reference voltage module, a comparison module and a logic operation module, wherein the reference voltage module is used for generating a reference voltage based on a power supply voltage and representing whether the reference voltage has generated a representation signal, the comparison module is used for comparing the reference voltage with the power supply voltage to generate a comparison signal, and the logic operation module is used for carrying out logic operation on the representation signal and the comparison signal to generate a reset signal. In one or more embodiments of the present invention, the reference voltage module includes a start-up unit and a voltage generation unit connected to each other, the start-up unit is configured to generate a start-up signal based on power-up of a power supply voltage, the voltage generation unit starts up and generates a reference voltage and a shut-down signal based on control of the start-up signal, and the start-up unit shuts down the start-up signal and generates a characterization signal based on the shut-down signal. In one or more embodiments of the present invention, the voltage generating unit includes a current mirror unit including a first current branch and a second current branch in proportion to a current, a first transistor, a second transistor, a first resistor, and a second resistor, the first terminal of the first transistor and the first terminal of the second transistor are connected to a ground voltage, the control terminal of the first transistor and the second terminal of the second transistor are connected to a first t