CN-122001363-A - Level shifter

CN122001363ACN 122001363 ACN122001363 ACN 122001363ACN-122001363-A

Abstract

The invention provides a level shifter, which is arranged in a die. The level shifter includes a pull-up transistor, a first pull-down transistor, a second pull-down transistor, and a control circuit. The first terminal of the pull-up transistor receives a first supply voltage that is higher than the base voltage of the die. The first end of the first pull-down transistor receives a second power voltage lower than the substrate voltage. The second pull-down transistor is coupled between the first pull-down transistor and the pull-up transistor. The second terminal of the pull-up transistor is coupled to the output terminal of the level shifter. The input end of the control circuit is coupled to the input end of the level shifter. The different output ends of the control circuit are respectively coupled to the control ends of the pull-up transistor, the second pull-down transistor and the first pull-down transistor.

Inventors

Zhao Daici
LIN YONGZHOU
CHENG ZHIXIU

Assignees

联咏科技股份有限公司

Dates

Publication Date: 20260508
Application Date: 20241108

Claims (15)

1. A level shifter disposed at a die, the level shifter comprising: A pull-up transistor having a first end, a second end, and a control end, wherein the first end of the pull-up transistor is coupled to a first supply voltage, the first supply voltage being higher than a base voltage of the die, and the second end of the pull-up transistor is coupled to an output end of the level shifter; A first pull-down transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first pull-down transistor is coupled to a second supply voltage, and the second supply voltage is lower than the substrate voltage of the die; A second pull-down transistor having a first end, a second end, and a control end, wherein the first end of the second pull-down transistor is coupled to the second end of the first pull-down transistor and the second end of the second pull-down transistor is coupled to the output end of the level shifter, and A control circuit having an input, a first output, a second output, and a third output, wherein the input of the control circuit is coupled to the input of the level shifter, the first output of the control circuit is coupled to the control of the pull-up transistor, the second output of the control circuit is coupled to the control of the second pull-down transistor, and the third output of the control circuit is coupled to the control of the first pull-down transistor.
2. The level shifter of claim 1, wherein the first pull-down transistor and the second pull-down transistor are fully isolated high voltage metal oxide semiconductor transistors.
3. The level shifter of claim 2, wherein the first pull-down transistor and the second pull-down transistor are fully isolated laterally diffused metal oxide semiconductor transistors.
4. The level shifter of claim 1, wherein a voltage difference between the first supply voltage and the second supply voltage is greater than a voltage-across-tolerance capability of either of the first pull-down transistor and the second pull-down transistor.
5. The level shifter of claim 1, wherein the level shifter further comprises: the charge sharing transistor is provided with a first end, a second end and a control end, wherein the first end of the charge sharing transistor is coupled to the first end of the second pull-down transistor and the second end of the first pull-down transistor, the second end of the charge sharing transistor is coupled to a charge sharing voltage, and the control end of the charge sharing transistor is coupled to a fourth output end of the control circuit.
6. The level shifter of claim 5, wherein the charge-sharing voltage has a level between the first supply voltage and the second supply voltage.
7. The level shifter of claim 5, wherein the level shifter is configured to provide the level shifter with a reference to the reference signal, In response to an input voltage at the input of the level shifter transitioning from an original low level to an original high level, the control circuit turns on the second pull-down transistor and turns off the pull-up transistor, the first pull-down transistor, and the charge-sharing transistor in a first transition phase, the control circuit turns on the second pull-down transistor and the charge-sharing transistor and turns off the pull-up transistor and the first pull-down transistor in a second transition phase after the first transition phase, the control circuit turns on the charge-sharing transistor and turns off the pull-up transistor, the first pull-down transistor, and the second pull-down transistor in a third transition phase after the second transition phase, and the control circuit turns on the charge-sharing transistor and turns off the first pull-down transistor and the second pull-down transistor in a fourth transition phase after the third transition phase, the control circuit turns on the first pull-down transistor and the second pull-down transistor and the pull-down transistor in a fourth transition phase after the third transition phase, the control circuit turns on the second pull-down transistor and the pull transistor in a fourth transition phase after the third transition phase In response to an input voltage of the input end of the level shifter transiting from the original high level to the original low level, the control circuit turns on the charge sharing transistor and turns off the pull-up transistor, the first pull-down transistor and the second pull-down transistor in a fifth transition stage, the control circuit turns on the second pull-down transistor and the charge sharing transistor and turns off the pull-up transistor and the first pull-down transistor in a sixth transition stage after the fifth transition stage, the control circuit turns on the second pull-down transistor and turns off the charge sharing transistor in a seventh transition stage after the sixth transition stage, and the control circuit turns on the first pull-down transistor and the second pull-down transistor and the pull-up transistor and the charge sharing transistor in an eighth transition stage after the seventh transition stage.
8. The level shifter of claim 1, wherein the first output of the control circuit outputs a first control signal to control the control terminal of the pull-up transistor, the second output of the control circuit outputs a second control signal to control the control terminal of the second pull-down transistor, the third output of the control circuit outputs a third control signal to control the control terminal of the first pull-down transistor, a voltage of the first terminal of the second pull-down transistor and the second terminal of the first pull-down transistor is a first node voltage, a second node voltage is the first node voltage plus a difference voltage, and a swing of the second control signal is between the first node voltage and the second node voltage.
9. The level shifter of claim 8, wherein the control circuit comprises: a node voltage generation circuit coupled to the first terminal of the second pull-down transistor and the second terminal of the first pull-down transistor to receive the first node voltage, wherein the node voltage generation circuit generates the second node voltage based on the first node voltage, and The driver is provided with a power end, a reference end and an output end, wherein the power end of the driver is coupled to the node voltage generating circuit to receive the second node voltage, the reference end of the driver is coupled to the first end of the second pull-down transistor and the second end of the first pull-down transistor to receive the first node voltage, and the output end of the driver is coupled to the control end of the second pull-down transistor to provide the second control signal.
10. The level shifter of claim 9, wherein the node voltage generation circuit comprises: a first current source having a first end and a second end, wherein the first end of the first current source is coupled to the differential voltage; A first transistor having a first end, a second end, and a control end, wherein the first end and the control end of the first transistor are coupled to the second end of the first current source, and A second transistor having a first end, a second end, and a control end, wherein the first end and the control end of the second transistor are coupled to the second end of the first transistor, and the second end of the second transistor is coupled to the first end of the second pull-down transistor and the second end of the first pull-down transistor to receive the first node voltage; a third transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the third transistor is coupled to the first power supply voltage, and the control terminal of the third transistor is coupled to the differential voltage; a fourth transistor having a first end, a second end, and a control end, wherein the first end of the fourth transistor is coupled to the second end of the third transistor, the control end of the fourth transistor is coupled to the first end of the first transistor, and the second end of the fourth transistor is coupled to the power supply end of the driver, and A second current source having a first end and a second end, wherein the first end of the second current source is coupled to the second end of the fourth transistor, and the second end of the second current source is coupled to the first end of the second pull-down transistor and the second end of the first pull-down transistor to receive the first node voltage.
11. The level shifter of claim 8, wherein a third supply voltage is the first supply node voltage minus a difference voltage, and the swing of the first control signal is between the first supply voltage and the third supply voltage.
12. The level shifter of claim 8, wherein a fourth supply voltage is the second supply node voltage plus a difference voltage, and the swing of the third control signal is between the fourth supply voltage and the second supply voltage.
13. The level shifter of claim 1, wherein the level shifter further comprises: the charge sharing diode has a first end and a second end, wherein the first end of the charge sharing diode is coupled to the first end of the second pull-down transistor and the second end of the first pull-down transistor, and the second end of the charge sharing diode is coupled to a charge sharing voltage.
14. The level shifter of claim 13, wherein the charge-sharing voltage has a level between the first supply voltage and the second supply voltage.
15. The level shifter of claim 13, wherein the level shifter is configured to provide the level shifter with a high-speed signal, In response to an input voltage at the input of the level shifter transitioning from an original low level to an original high level, the control circuit turns on the second pull-down transistor and turns off the pull-up transistor and the first pull-down transistor in a first transition phase, the control circuit turns off the pull-up transistor, the second pull-down transistor and the first pull-down transistor in a second transition phase after the first transition phase, and the control circuit turns on the pull-up transistor and turns off the first pull-down transistor and the second pull-down transistor in a third transition phase after the second transition phase, and In response to an input voltage at the input of the level shifter transitioning from the original high level to the original low level, the control circuit turns off the pull-up transistor, the second pull-down transistor, and the first pull-down transistor in a fourth transition phase, the control circuit turns on the second pull-down transistor and the charge sharing diode and turns off the pull-up transistor and the first pull-down transistor in a fifth transition phase after the fourth transition phase, and the control circuit turns on the first pull-down transistor and the second pull-down transistor and turns off the pull-up transistor in a sixth transition phase after the fifth transition phase.

Description

Level shifter Technical Field The present invention relates to an integrated circuit (INTEGRATED CIRCUIT, IC), and in particular to a large voltage swing (voltage swing) level shifter (LEVEL SHIFTER) disposed in a die (die). Background The level shifter (LEVEL SHIFTER) is commonly located in the die (die). When the Voltage Swing (VSUB) lower limit of the output terminal of the level shifter is lower than the die substrate voltage (substrate voltage, VSUB), the junction (parasitic diode) between the P-type substrate of the die and the pull-down transistor of the level shifter is turned on, i.e., the level shifter is leaky, so the conventional die substrate Voltage (VSUB) cannot be set to 0 v. Disclosure of Invention The present invention provides a level shifter (LEVEL SHIFTER) to provide a voltage swing (voltage swing) output at a first supply voltage (higher than the die's base voltage) to a second supply voltage (lower than the base voltage). In an embodiment according to the invention, the level shifter described above is provided in a die. The level shifter includes a pull-up transistor, a first pull-down transistor, a second pull-down transistor, and a control circuit. The first terminal of the pull-up transistor is coupled to a first supply voltage, wherein the first supply voltage is higher than a base voltage of the die. The second terminal of the pull-up transistor is coupled to the output terminal of the level shifter. The first end of the first pull-down transistor is coupled to a second power supply voltage, wherein the second power supply voltage is lower than the substrate voltage of the die. The first end of the second pull-down transistor is coupled to the second end of the first pull-down transistor. The second end of the second pull-down transistor is coupled to the output end of the level shifter. The input end of the control circuit is coupled to the input end of the level shifter. The first output terminal of the control circuit is coupled to the control terminal of the pull-up transistor. The second output terminal of the control circuit is coupled to the control terminal of the second pull-down transistor. The third output terminal of the control circuit is coupled to the control terminal of the first pull-down transistor. Based on the above, in some embodiments, the first and second pull-down transistors may be full isolated (MOS) transistors. Therefore, the first pull-down transistor and the second pull-down transistor do not leak to the substrate of the die. In addition, the first pull-down transistor and the second pull-down transistor are connected in series between the output terminal of the level shifter and the second power supply voltage (lower than the substrate voltage of the die). Therefore, the voltage-across-withstand capability (rated maximum source-drain voltage) of either one of the first pull-down transistor and the second pull-down transistor may be smaller than the voltage difference between the first power supply voltage to the second power supply voltage. In order to make the above features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Drawings Fig. 1 is a schematic diagram of a circuit (circuit) of a level shifter LEVEL SHIFTER disposed in a die, according to one embodiment. Fig. 2 is a schematic diagram of a circuit block (circuit block) of a level shifter according to an embodiment of the present invention. Fig. 3 is a schematic waveform diagram of an input terminal and an output terminal of a level shifter according to an embodiment of the invention. Fig. 4 is a schematic diagram illustrating the operation of a transistor according to an embodiment of the invention. FIG. 5 is a schematic diagram of a portion of a control circuit according to an embodiment of the invention. Fig. 6 is a circuit block diagram of a level shifter according to another embodiment of the present invention. Fig. 7 is a schematic diagram illustrating the operation of a transistor according to another embodiment of the present invention. Description of the reference numerals 100. 200, 600 Level shifter 210. 610 Control circuit 211 Logic circuit 212. 213, 214, 215, 520: Driver 510 Node voltage generating circuit 511. 517 Current source 512. 513, 515, 516 Transistors 514 Capacitor D61 charge sharing diode GND1 ground voltage LVSH _In2 LVSH _in6: input terminal LVSH-OUT 1, LVSH-OUT 2 LVSH _OUT6: an output terminal N11, N21, N22, N61, N62 pull-down transistors N12, N13 and N23 charge sharing transistor P11, P21, P61 pull-up transistors P31 to P39, P71 to P77, transition stage VBOOT, VBOOT_REG, node voltage VCS2, VCS6 charge sharing voltage VG11, VG12, VG13, VGBS, VGCS, VGHS, VGLS control signal VGH1, VGH2, VGH6, VGL1, VGL2, VGL6, VHS_REG, VLS_REG: supply voltage VH original high level VL original low level Detailed Description Reference will now be made in detail to the exemplary embodiments of the present in