CN-122001401-A - Communication module
Abstract
Provided is a communication module capable of reducing the circuit scale. The communication module (10) is provided with an amplification control device (101) which is connected to a master device (201) and receives a master signal from the master device, wherein the master signal contains a command signal, an address signal specifying the address of at least one register of an antenna switch (102) and a band selection switch (103), and a write data signal to be recorded in the register corresponding to the address, the amplification control device (101) interprets the command signal, and the antenna switch (102) and the band selection switch (103) are connected to the amplification control device (101) through a first signal line for transmitting a clock signal and a second signal line for transmitting a data signal.
Inventors
- NAKAMUTA KAZUHIRO
Assignees
- 株式会社村田制作所
Dates
- Publication Date
- 20260508
- Application Date
- 20251104
- Priority Date
- 20241106
Claims (14)
- 1. A communication module is provided with: a first sub-device connected to the main device, and At least one second sub-device not connected to the main device but connected to the first sub-device through a first signal line for transmitting a clock signal and a second signal line for transmitting a data signal, The first sub-device receives a main signal from the main device, wherein the main signal contains a command signal, an address signal specifying an address of at least one register possessed by at least one second sub-device, and a write data signal to be recorded to a register corresponding to the address, the address signal being a signal subsequent to the command signal, the write data signal being a signal subsequent to the address signal, The first sub-device interprets the command signal, The first sub-device generates a write instruction signal after receiving the command signal and during receiving the main signal in a case where information based on the data signal is to be written to any one of the at least one second sub-device based on an interpretation result of the command signal, The first sub-device generates the data signal based on the address signal and the write data signal to be provided to each of the at least one second sub-device after receiving the command signal and during receiving the main signal based on an interpretation result of the command signal, The first sub-device, after receiving the command signal and during the reception of the main signal, supplies the write indication signal to each of the at least one second sub-device through the first signal line or the second signal line, and supplies the data signal to each of the at least one second sub-device through the second signal line, Each of the at least one second sub-device determines whether the register corresponding to the address indicated by the address signal is included in the at least one second sub-device, and when the register is included in the at least one second sub-device and the write instruction signal is supplied from the first sub-device, each of the at least one second sub-device writes the write data signal to the register.
- 2. The communication module of claim 1, wherein, The first sub-device generates the data signal containing identification information, which is information based on a category of writing of the write data signal to the at least one register, the write instruction signal being contained as the identification information at an end of the data signal, Each of the at least one second sub-device writes the write data signal to the register based on the identification information.
- 3. The communication module of claim 2, wherein, The identification information is information indicating a data length of the data signal.
- 4. The communication module of claim 2, wherein, The identification information is information indicating the type of data included in the data signal.
- 5. The communication module of claim 4, wherein, The class of writing includes a writing class indicating that a prescribed bit of the register is not rewritten and a part of the write data signal is written to the register, The identification information indicates whether the type of the data included in the data signal is the write data signal or a mask signal indicating the prescribed bit that is not rewritten, Each of the at least one second sub-device writes a portion of the write data signal to the at least one register based on the write data signal and the mask signal.
- 6. The communication module according to claim 4 or 5, wherein, The class of writing includes a writing class that indicates writing a first write data signal to a first register of the at least one second sub-device and writing a second write data signal to a second register of the at least one second sub-device, The identification information is contained at the end of each of the first write data signal and the second write data signal, Each of the at least one second sub-device writes the first write data signal to the first register and writes the second write data signal to the second register based on the identification information.
- 7. The communication module according to any one of claims 1 to 6, wherein, The write indication signal is the clock signal generated subsequent to the data signal.
- 8. The communication module according to any one of claims 1 to 7, wherein, The master signal comprising the command signal indicating read-out of information from the at least one register of the at least one second sub-device, The first sub-device generates a read instruction signal based on the address signal in a case where information stored in the at least one register is to be read out from the at least one second sub-device based on an interpretation result of the command signal, The first sub-device provides the read indication signal to each of the at least one second sub-device via the first signal line or the second signal line, The first sub-device receives a read signal read from the register of any one of the at least one second sub-device, The first sub-device transmits the read-out signal to the main device.
- 9. The communication module of claim 8, wherein, The first sub-device generates the read-out indication signal containing identification information, which is information based on the type of read-out from the at least one register, The first sub-device receives the read-out signal read out from the at least one second sub-device based on the identification information.
- 10. The communication module of claim 9, wherein, The identification information is information indicating a data length of the read signal.
- 11. The communication module according to any one of claims 8 to 10, wherein, The master signal comprises the command signal representing setting the at least one second sub-device to a write mode or a read mode, The first sub-device generates a mode setting signal for setting the at least one second sub-device to a write mode or a read mode based on an interpretation result of the command signal, The first sub-device provides the mode setting signal to each of the at least one second sub-device through the first signal line or the second signal line, The first sub-device receives a read signal read from the register of any one of the at least one second sub-device which is set to a read mode and to which the read instruction signal is supplied.
- 12. The communication module according to any one of claims 1 to 11, wherein, The first sub-device is an amplification control device that controls a power amplification circuit, The at least one second sub-device is an antenna switch that selects a signal amplified by the power amplifying circuit and transceived through the antenna, or a band selection switch that selects a wavelength of the signal transceived through the antenna.
- 13. The communication module according to any one of claims 1 to 12, wherein, The first sub-device determines not to write the write data signal to any one of the at least one second sub-device when the master signal has an error.
- 14. A communication module is provided with: a first sub-device connected to a master device, receiving a master signal from the master device, wherein the master signal contains a command signal and a device ID signal representing a device ID for identifying a device, the first sub-device interpreting the command signal, the first sub-device being assigned first device ID information; a second sub-device connected to the first sub-device through a first signal line for transmitting a clock signal and a second signal line for transmitting a data signal, the second sub-device being assigned second device ID information, and A third sub-device connected to the first sub-device through a third signal line for transmitting a clock signal and a fourth signal line for transmitting a data signal, the third sub-device being assigned third device ID information, Wherein the first sub-device determines whether the device ID signal contained in the main signal coincides with first device ID information possessed by the first sub-device, The first sub-device determines whether the device ID signal contained in the main signal coincides with the second device ID information or the third device ID information possessed by the first sub-device, When the device ID signal included in the main signal matches the second device ID information of the first sub-device, the first sub-device generates a first sub-device control signal indicating writing or reading of data for the second sub-device based on the interpretation result of the command signal, The first sub-device provides the first sub-device control signal to the second sub-device, When the device ID signal contained in the main signal matches the third device ID information of the first sub-device, the first sub-device generates a second sub-device control signal indicating writing or reading of data for the third sub-device based on the interpretation result of the command signal, The first sub-device provides the second sub-device control signal to the third sub-device.
Description
Communication module Technical Field The present invention relates to a communication module. Background In a semiconductor device, data may be transmitted and received between a plurality of devices by serial communication. In serial communication, a master device (MASTER DEVICE) and a slave device (SLAVE DEVICE) connected to the master device are present in the device, and data is written to the slave device by transmitting a signal from the master device to the slave device. The slave device may interpret a command included in a signal from the master device and execute a process corresponding to the command. The circuit scale of the circuit for command interpretation is large. Therefore, when a circuit for command interpretation is provided in each of the sub-devices, the entire circuit scale becomes large. In addition, patent document 1 describes a configuration in which an interface circuit for interpreting a signal from a master device is provided separately from each slave device, as a configuration in which a circuit for command interpretation is not provided in each slave device. Prior art literature Patent literature Patent document 1 U.S. patent application publication No. 2017/0192918 Disclosure of Invention Problems to be solved by the invention In the configuration described in patent document 1, an interface circuit is connected to a slave device that is a transmission destination of data through a clock bus, a data bus, and an enable bus for transmitting an enable signal. In the configuration described in patent document 1, an interface circuit selects any one of a plurality of sub-devices via an enable bus and transmits data. In this case, since the enable bus is provided for each sub-device, a region for providing wiring of the enable bus is required, and the entire circuit scale becomes large. The present invention has been made in view of such circumstances, and an object thereof is to provide a communication module capable of reducing the circuit scale. Solution for solving the problem The communication module according to one aspect of the present invention includes a first sub-device connected to a main device, and at least one second sub-device connected to the first sub-device via a first signal line for transmitting a clock signal and a second signal line for transmitting a data signal, without being connected to the main device. The first sub-device receives a main signal from the main device, wherein the main signal contains a command signal, an address signal specifying an address of at least one register of at least one second sub-device, and a write data signal to be recorded to the register corresponding to the address, the address signal is a signal subsequent to the command signal, the write data signal is a signal subsequent to the address signal, the first sub-device interprets the command signal, the first sub-device generates a write instruction signal after receiving the command signal and during reception of the main signal in a case where information based on the data signal is to be written to any one of the at least one second sub-device, the first sub-device generates a data signal based on the interpretation result of the command signal to be supplied to each of the at least one second sub-device based on the address signal and the write data signal after receiving the command signal and during reception of the main signal, and the first sub-device supplies the data signal to each of the at least one second sub-device through the first signal line or each of the second sub-devices after receiving the command signal and during reception of the main signal. Each of the at least one second sub-device determines whether a register corresponding to an address indicated by the address signal is included in the at least one second sub-device, and in the case where the register is included in the at least one second sub-device and the write instruction signal is supplied from the first sub-device, each of the at least one second sub-device writes the write data signal to the register. The communication module according to another aspect of the present invention includes a first sub-device connected to a master device, receiving a master signal from the master device, wherein the master signal includes a command signal and a device ID signal indicating a device ID for identifying the device, the first sub-device interprets the command signal, the first sub-device is assigned first device ID information, a second sub-device connected to the first sub-device through a first signal line for transmitting a clock signal and a second signal line for transmitting a data signal, the second sub-device is assigned second device ID information, and a third sub-device connected to the first sub-device through a third signal line for transmitting the clock signal and a fourth signal line for transmitting the data signal, and the third sub-device is assigned third device ID informatio