CN-122001721-A - Sequence detection device and sequence detection method

Abstract

A sequence detecting apparatus and a sequence detecting method. The sequence detection device comprises a feedforward filter, a feedback filter, a combining circuit, a decision circuit and a sequence detection circuit. The feedforward filter processes the received signal to produce a first equalized signal. The feedback filter processes the symbol decision signal to produce a second equalized signal. The combining circuit combines the first and second equalized signals to generate a sample signal. The decision circuit performs hard decisions on the sample signal to generate the symbol decision signal. The sequence detection circuit performs sequence detection on the first equalization signal and includes a region estimation circuit and a grid selection circuit. The region estimation circuit classifies each sample in the sample signal into a region. The grid selection circuit selects a grid scheme for branch metric calculation according to the region estimation result output by the region estimation circuit.

Inventors

• WU MINHUA

Assignees

• 达发科技股份有限公司

Dates

Publication Date

20260508

Application Date

20250516

Priority Date

20241106

Claims (20)

1. 1. A sequence detection apparatus comprising: a feedforward filter for processing the received signal to generate a first equalized signal; A feedback filter for processing the symbol decision signal to generate a second equalized signal; A combining circuit for combining the first equalization signal and the second equalization signal to generate a sample signal; A decision circuit for performing hard decisions on the sample signal to generate the symbol decision signal, and A sequence detection circuit for performing sequence detection on the first equalized signal to generate and output a symbol sequence, wherein the sequence detection circuit comprises: A region estimation circuit independent of the decision circuit and used for classifying each of the plurality of samples of the sample signal into a region of a plurality of regions, and And the grid selection circuit is used for selecting one of a plurality of grid schemes for branch metric calculation according to the region estimation results of two samples in the plurality of samples output by the region estimation circuit.
2. 2. The sequence detecting apparatus of claim 1, wherein the plurality of samples comprises a plurality of consecutive samples, the plurality of consecutive samples comprises a first sample and a second sample immediately following the first sample, the region estimation circuit generates a first region estimation result of the first sample and a second region estimation result of the second sample, and the grid selection circuit selects a grid scheme indexed by the first region estimation result and the second region estimation result from the plurality of grid schemes.
3. 3. The sequence detection apparatus of claim 1, wherein the sequence detection circuit further comprises: and the control circuit is used for adaptively adjusting the plurality of areas.
4. 4. A sequence detection apparatus as claimed in claim 3, wherein the plurality of grid schemes are fixed.
5. 5. The sequence detecting apparatus of claim 3, wherein the control circuit is further configured to obtain a signal quality indicator, and adaptively adjust a plurality of thresholds according to the signal quality indicator, wherein the plurality of regions are defined by the plurality of thresholds.
6. 6. The sequence detection apparatus of claim 1, wherein the sequence detection circuit further comprises: And the control circuit is used for adaptively adjusting the grid schemes.
7. 7. The sequence detection apparatus of claim 6, wherein the plurality of regions are fixed.
8. 8. The sequence detecting apparatus of claim 6, wherein the control circuit is further configured to obtain a signal quality indicator, and adaptively adjust the plurality of grid schemes according to the signal quality indicator.
9. 9. The sequence detection apparatus of claim 1, wherein the received signal is derived from a pulse amplitude modulated signal.
10. 10. The sequence detection apparatus of claim 1, wherein the received signal is derived from a quadrature amplitude modulated signal.
11. 11. A sequence detection method comprising: performing a feedforward filtering operation on the received signal to generate a first equalized signal; Performing a feedback filtering operation on the symbol decision signal to generate a second equalized signal; combining the first equalized signal and the second equalized signal to generate a sample signal; performing a hard decision operation on the sample signal to produce the symbol decision signal, and Performing a sequence detection operation on the first equalized signal to generate and output a symbol sequence, wherein the sequence detection operation comprises: Performing a region estimation operation to classify each of a plurality of samples of the sample signal as a region of a plurality of regions, wherein the region estimation operation is independent of the hard decision operation, and And performing a grid selection operation according to the region estimation results of two samples in the plurality of samples output by the region estimation operation, so as to select one of a plurality of grid schemes for branch metric calculation.
12. 12. The sequence detecting method according to claim 11, wherein the plurality of samples includes a plurality of consecutive samples including a first sample and a second sample immediately following the first sample, the region estimation operation generates a first region estimation result of the first sample and a second region estimation result of the second sample, and the grid selection operation selects a grid scheme indexed by the first region estimation result and the second region estimation result from the plurality of grid schemes.
13. 13. The sequence detection method of claim 11, wherein the sequence detection operation further comprises: the plurality of regions is adaptively adjusted.
14. 14. The sequence detection method of claim 13, wherein the plurality of trellis schemes are fixed.
15. 15. The sequence detection method of claim 13 wherein adaptively adjusting the plurality of regions comprises: Obtaining signal quality index, and A plurality of thresholds are adaptively adjusted according to the signal quality indicator, wherein the plurality of regions are defined by the plurality of thresholds.
16. 16. The sequence detection method of claim 11, wherein the sequence detection operation further comprises: the plurality of grid schemes is adaptively adjusted.
17. 17. The sequence detection method of claim 16 wherein the plurality of regions are fixed.
18. 18. The sequence detection method of claim 16, wherein adaptively adjusting the plurality of trellis schemes comprises: Obtaining signal quality index, and The plurality of grid schemes are adaptively adjusted according to the signal quality indicator.
19. 19. The sequence detection method of claim 11 wherein the received signal is derived from a pulse amplitude modulated signal.
20. 20. The sequence detection method of claim 11 wherein the received signal is derived from a quadrature amplitude modulated signal.

Description

Sequence detection device and sequence detection method Technical Field The present invention relates to data communication (data communication), and more particularly, to a sequence detection apparatus and a related sequence detection method for maximum likelihood sequence detection (maximum likelihood sequence detection, hereinafter, abbreviated as "MLSD") using programmable (programmable) branch metric (hereinafter, abbreviated as "BM") computation reduction (computation reduction). Background In high-speed data communication systems, existing filtering and equalization (equalization) schemes may not be sufficient to support challenging channels, for example, due to the high demands on data communication speed, the data bandwidth grows significantly, which makes inter-symbol interference (inter-symbol interference, hereinafter simply "ISI") of the data channels and crosstalk (crosstalkinterference) from neighboring data channels more severe, and the data modulation scheme also becomes more complex. The typical feed-forward equalizer (FFE) may use information of adjacent symbols to cancel both pre-cursor ISI and post-cursor ISI, however, since the typical feed-forward equalizer does not use any noiseless estimated symbols (noise-FREE ESTIMATED symbols), such as noise-free truncated symbols (noise-FREE SLICED symbols), noise other than ISI may be enhanced by the typical feed-forward equalizer. A typical decision-feedback equalizer (DFE) may cancel the post-cursor ISI by using one or more noiseless estimated previous symbols (e.g., one or more noiseless truncated previous symbols), however, depending on previous decision results, a typical decision-feedback equalizer may result in error propagation (error propagation). In other words, conventional linear equalization methods (e.g., feed forward equalization) and nonlinear equalization methods (e.g., decision feedback equalization) may not provide adequate equalization performance in some cases. MLSDs use inter-symbol interference and further eliminate inter-symbol interference to handle noise, and thus are popular techniques for improving performance and overcoming nonlinear errors in high-speed data communication systems, however, MLSDs require implementing Viterbi (Viterbi) algorithms, which are relatively complex and consume relatively large computing resources, for example, the number of BM computations to be performed in a data cycle may be K 2, which means that a large amount of computing resources are required to obtain BM information. Thus, there is a need for an innovative low complexity and power-saving MLSD in a sequence detector for use in a high-speed data communication system. Disclosure of Invention It is an object of the present application to provide a sequence detection apparatus and related sequence detection method for simplified maximum likelihood sequence detection using programmable branch metric computation. In one embodiment of the present application, a sequence detection apparatus is disclosed. The sequence detection device comprises a feedforward filter, a feedback filter, a combining circuit, a decision circuit and a sequence detection circuit. The feedforward filter is used for processing a received signal to generate a first balanced signal. The feedback filter is used for processing a symbol decision signal to generate a second equalization signal. The combining circuit is used for combining the first balanced signal and the second balanced signal to generate a sample signal. The decision circuit is used for performing hard decision on the sample signal to generate the symbol decision signal. The sequence detection circuit is used for performing sequence detection on the first equalization signal to generate and output a symbol sequence. The sequence detection circuit comprises a region estimation circuit and a grid selection circuit. The region estimation circuit is independent of the decision circuit and is used for classifying each of a plurality of samples of the sample signal into a region of a plurality of regions. The grid selection circuit is used for selecting one of a plurality of grid schemes for branch metric calculation according to the region estimation results of two samples in the plurality of samples output by the region estimation circuit. In one embodiment of the application, a sequence detection method is disclosed. The sequence detection method comprises the steps of performing a feedforward filter operation on a received signal to generate a first balanced signal, performing a feedback filter operation on a symbol decision signal to generate a second balanced signal, generating a sample signal by combining the first balanced signal and the second balanced signal, performing a hard decision operation on the sample signal to generate the symbol decision signal, and performing a sequence detection operation on the first balanced signal to generate and output a symbol sequence, wherein the sequence detection