CN-122002047-A - DCT module verification method, DCT module verification device, electronic equipment and storage medium

CN122002047ACN 122002047 ACN122002047 ACN 122002047ACN-122002047-A

Abstract

The application provides a DCT module verification method, a device, an electronic device and a computer readable storage medium, wherein the method comprises the steps of obtaining a limit input matrix and a corresponding expected value; the method comprises the steps of obtaining scaling factors of a DCT module, inputting a limit input matrix into the DCT module after scaling according to the scaling factors, obtaining an output result of the DCT module, calculating a difference value between the output result and a target expected result, and determining whether the calculation accuracy of the DCT module meets the standard according to the difference value, wherein the target expected result is a value obtained by scaling an expected value corresponding to the limit input matrix according to the scaling factors. The application can directly and effectively cover the boundary scene, and realize the verification of the worst circuit working state.

Inventors

HU CHAOQIANG
WANG JINHUI

Assignees

上海天数智芯半导体股份有限公司

Dates

Publication Date: 20260508
Application Date: 20251224

Claims (20)

1. A DCT module verification method, comprising: Obtaining a limit input matrix and an expected value corresponding to the limit input matrix, wherein the limit input matrix is a pixel value matrix which enables the discrete cosine transform DCT module to generate the maximum value of an Alternating Current (AC) coefficient after DCT, and the expected value corresponding to the limit input matrix is the maximum value of the AC coefficient; Obtaining a scaling factor of the DCT module; The limit input matrix is scaled according to the scaling coefficient and then is input into the DCT module, and an output result of the DCT module is obtained; and calculating a difference value between the output result and a target expected result, and determining whether the calculation accuracy of the DCT module meets the standard according to the difference value, wherein the target expected result is a value obtained by scaling an expected value corresponding to the limit input matrix according to the scaling coefficient.
2. The DCT module verification method of claim 1, wherein the scaling factor of the DCT module is determined by: acquiring a circuit structure of the DCT module; identifying a data path in a circuit structure of the DCT module; and determining the scaling factor of the DCT module according to an operation algorithm and an operation coefficient of data to be operated in sequence in the data path.
3. The method of verifying the DCT module of claim 2, wherein the DCT module is a DCT module of two-dimensional separation structure, and the scaling factors comprise a first scaling factor of the entire data path and a second scaling factor of an intermediate circuit in the data path for connecting two one-dimensional DCT circuits; Determining the scaling factor of the DCT module according to an operation algorithm and an operation coefficient of data to be operated in sequence in the data path, wherein the scaling factor comprises the following steps: Determining the first scaling factor according to all operation algorithms and operation coefficients of data in the data path, wherein the operation algorithms and the operation coefficients need to be operated sequentially; And determining the second scaling factor according to all operation algorithms and operation coefficients of the data in the intermediate circuit, wherein the operation algorithms and the operation coefficients need to be operated sequentially.
4. The DCT module authentication method of claim 3, wherein, The limiting input matrix is scaled according to the scaling coefficient and then input into the DCT module, and an output result of the DCT module is obtained, wherein the limiting input matrix is scaled according to the first scaling coefficient and then input into the DCT module, and a first output result of the DCT module is obtained; Calculating a difference value between the output result and a target expected result, and determining whether the calculation precision of the DCT module meets the standard according to the difference value, wherein the calculating comprises calculating a first difference value between the first output result and a first target expected result, calculating a second difference value between the second output result and a second target expected result, and determining that the calculation precision of the DCT module does not meet the standard under the condition that the first difference value or the second difference value does not meet the preset calculation precision; The first target expected result is obtained by scaling an expected value corresponding to the limit input matrix according to the first scaling factor, and the second target expected result is obtained by scaling an expected value corresponding to the limit input matrix according to the second scaling factor.
5. The DCT module validation method according to claim 1, wherein the limit input matrix is determined by: Acquiring a value range of each element in a pixel value matrix; acquiring DCT converted coefficient matrixes corresponding to all possible pixel value matrixes; taking a pixel value matrix corresponding to the maximum element value in all element values of all coefficient matrixes as the limit input matrix, wherein an expected value corresponding to the limit input matrix is the maximum element value in all element values; calculating a difference between the output result and a target expected result, including: And calculating a difference value between the value of the element positioned at the (U1, V1) position in the output result and the target expected result, wherein the output result is a coefficient matrix of U x V, U1 is equal to U/2, and V1 is equal to V/2.
6. The DCT module validation method according to claim 1, wherein the limit input matrix is a plurality of, each of the limit input matrices determined by: Acquiring a value range of each element in a pixel value matrix; acquiring DCT converted coefficient matrixes F (u, v) corresponding to all possible pixel value matrixes; Determining the maximum element value of all element values of all coefficient matrixes F (u, v) at the position, taking a pixel value matrix corresponding to the maximum element value as a limit input matrix corresponding to the position, and taking the maximum element value as an expected value of the limit input matrix corresponding to the position; Calculating a difference value between the output result and a target expected result, and determining whether the calculation accuracy of the DCT module meets the standard according to the difference value, wherein the method comprises the following steps: Calculating a difference value between a value of an element at a target position in an output result and a target expected result corresponding to the limit input matrix according to the output result corresponding to each limit input matrix; Under the condition that the difference value corresponding to any limit input matrix does not meet the preset calculation precision, determining that the calculation precision of the DCT module does not reach the standard; and under the condition that the difference values corresponding to all the limit input matrixes meet the preset calculation precision, determining that the calculation precision of the DCT module meets the standard.
7. The DCT module verification method according to any of claims 1-5, wherein prior to calculating the difference between the output result and a target expected result, the method further comprises: performing data overflow check on the output result; It is determined that there is no data overflow.
8. The DCT module verification method of claim 7, wherein the method further comprises: if the data overflow exists, the DCT module is determined to have the problem of insufficient bit width.
9. The DCT module verification method of claim 7, wherein the method further comprises: Judging the bit width of the output result under the condition that no data overflow exists; if the bit width of the output result is smaller than the bit width of a register in the DCT module, determining that the DCT module has the problem of bit width redundancy.
10. The DCT module verification method of claim 6, wherein, before calculating, for each of the output results corresponding to the limiting input matrix, a difference between the value of the element at the target position in the output result and the target expected result corresponding to the limiting input matrix, the method further comprises: Aiming at the output result corresponding to each limit input matrix, carrying out data overflow inspection on the output result corresponding to the limit input matrix; And determining that the output result corresponding to the limit input matrix does not have data overflow.
11. The DCT module verification method of claim 10, wherein the method further comprises: Aiming at the output result corresponding to any limit input matrix, if the output result corresponding to the limit input matrix has data overflow, determining that a target register in the DCT module has the problem of insufficient bit width; the target register is a register that records a value of an element located at the target position in an output result.
12. The DCT module verification method of claim 10, wherein the method further comprises: Aiming at the output result corresponding to any limit input matrix, if the output result corresponding to the limit input matrix does not have data overflow, judging the bit width of the output result corresponding to the limit input matrix; if the bit width of the output result corresponding to the limit input matrix is smaller than the bit width of a target register in the DCT module, determining that the target register has the problem of bit width redundancy; the target register is a register that records a value of an element located at the target position in an output result.
13. A DCT module verification method, comprising: obtaining a limit input matrix, wherein the limit input matrix is a pixel value matrix which enables the Discrete Cosine Transform (DCT) module to generate the maximum value of Alternating Current (AC) coefficients after DCT; Obtaining a scaling factor of the DCT module; The limit input matrix is scaled according to the scaling coefficient and then is input into the DCT module, and an output result of the DCT module is obtained; performing data overflow check on the output result; if the output result has data overflow, determining that the DCT module has the problem of insufficient bit width; Judging the bit width of the output result if the output result has no data overflow, and determining that the DCT module has the bit width redundancy problem if the bit width of the output result is smaller than the bit width of a register in the DCT module.
14. The DCT module verification method of claim 13, wherein the scaling factor of the DCT module is determined by: acquiring a circuit structure of the DCT module; identifying a data path in a circuit structure of the DCT module; and determining the scaling factor of the DCT module according to an operation algorithm and an operation coefficient of data to be operated in sequence in the data path.
15. The DCT module authentication method of claim 14, wherein the DCT module is a DCT module of two-dimensional separation structure, the scaling factors comprise a first scaling factor for the entire data path and a second scaling factor for an intermediate circuit in the data path connecting two one-dimensional DCT circuits; Determining the scaling factor of the DCT module according to an operation algorithm and an operation coefficient of data to be operated in sequence in the data path, wherein the scaling factor comprises the following steps: Determining the first scaling factor according to all operation algorithms and operation coefficients of data in the data path, wherein the operation algorithms and the operation coefficients need to be operated sequentially; Determining the second scaling factor according to all operation algorithms and operation coefficients of the data in the intermediate circuit, wherein the operation algorithms and the operation coefficients need to be operated sequentially; the output results comprise a first output result obtained by inputting the limit input matrix into the DCT module after scaling according to the first scaling coefficient, and a second output result obtained by inputting the limit input matrix into the DCT module after scaling according to the second scaling coefficient.
16. The DCT module verification method according to any of claims 13-15, wherein the limit input matrix is determined by: Acquiring a value range of each element in a pixel value matrix; acquiring DCT converted coefficient matrixes corresponding to all possible pixel value matrixes; and taking a pixel value matrix corresponding to the maximum element value in all element values of all coefficient matrixes as the limit input matrix.
17. The DCT module verification method according to any of claims 13-15, wherein the limit input matrix is a plurality of, each of the limit input matrices determined by: Acquiring a value range of each element in a pixel value matrix; acquiring DCT converted coefficient matrixes F (u, v) corresponding to all possible pixel value matrixes; For each position in the coefficient matrix F (u, v), determining the maximum element value in all element values of all the coefficient matrices F (u, v) at the position, and taking a pixel value matrix corresponding to the maximum element value as a limit input matrix corresponding to the position.
18. The DCT module verification method of claim 17, wherein performing a data overflow check on the output result comprises: respectively carrying out data overflow inspection on output results corresponding to any limit input matrix; If the output result corresponding to the limit input matrix has data overflow, determining that a target register in the DCT module has insufficient bit width, wherein the target register is a register for recording the value of an element positioned at the target position in the output result; if the output result corresponding to the limit input matrix does not have data overflow, judging the bit width of the output result corresponding to the limit input matrix, and if the bit width of the output result corresponding to the limit input matrix is smaller than the bit width of a target register in the DCT module, determining that the target register has the problem of bit width redundancy.
19. A DCT module verification apparatus, comprising: The system comprises a first acquisition module, a limit input matrix, a first acquisition module and a second acquisition module, wherein the first acquisition module is used for acquiring a limit input matrix and an expected value corresponding to the limit input matrix, the limit input matrix is a pixel value matrix which enables the Discrete Cosine Transform (DCT) module to generate the maximum value of an Alternating Current (AC) coefficient after DCT, and the expected value corresponding to the limit input matrix is the maximum value of the AC coefficient; The first acquisition module is further used for acquiring a scaling coefficient of the DCT module; The first verification module is used for inputting the limit input matrix into the DCT module after scaling according to the scaling coefficient and obtaining an output result of the DCT module; The first verification module is further configured to calculate a difference value between the output result and a target expected result, and determine whether the calculation accuracy of the DCT module meets the standard according to the difference value, where the target expected result is a value obtained by scaling an expected value corresponding to the limit input matrix according to the scaling factor.
20. A DCT module verification apparatus, comprising: The second acquisition module is used for acquiring a limit input matrix, wherein the limit input matrix is a pixel value matrix which enables the Discrete Cosine Transform (DCT) module to perform DCT and then generate the maximum value of an Alternating Current (AC) coefficient; the second acquisition module is further used for acquiring the scaling coefficient of the DCT module; the second verification module is used for inputting the limit input matrix into the DCT module after scaling according to the scaling coefficient and obtaining an output result of the DCT module; The second verification module is further configured to perform data overflow inspection on the output result, determine that the DCT module has a problem of insufficient bit width if the output result has data overflow, determine that the output result has bit width if the output result has no data overflow, and determine that the DCT module has a problem of bit width redundancy if the bit width of the output result is smaller than the bit width of a register in the DCT module.

Description

DCT module verification method, DCT module verification device, electronic equipment and storage medium Technical Field The present application relates to the field of circuit verification technologies, and in particular, to a method and apparatus for verifying a DCT module, an electronic device, and a computer readable storage medium. Background In image codec hardware circuits such as a JPEG (Joint Photographic Experts Group ) encoder circuit, a JPEG decoder circuit, an MPEG (Moving Pictures Experts Group, moving picture experts group) encoder circuit, an MPEG decoder circuit, etc., a DCT (Discrete Cosine Transform ) module is one of core devices for converting spatial domain data into frequency domain data, thereby realizing energy concentration, facilitating subsequent quantization and entropy encoding. In the prior art, the DCT module is usually verified by randomly generating a large number of pictures or capturing a large number of pictures from a public data set and inputting the pictures into the DCT module, so as to check whether an output result is in an expected range, thereby realizing the verification of whether the calculation precision of the DCT module meets the requirement. However, this method relies on random or massive picture testing, which is huge in case number, but insufficient in effectiveness, and generally cannot effectively cover the boundary scene, resulting in that verification cannot reach the worst circuit working state, and a great deal of verification power consumption overhead and verification time are also required. Furthermore, DCT modules often require data scaling during operation. The scaled data is usually buffered by a register, and if the register bit width is insufficient, it may cause a calculation error (data overflow), and if the register bit width is too large, it may cause a resource waste (bit width redundancy). The conventional verification method is difficult to provide a basis for optimizing the bit width in the DCT module. Disclosure of Invention An object of an embodiment of the present application is to provide a method, an apparatus, an electronic device, and a computer-readable storage medium for verifying a DCT module, which are used for at least partially solving the problems of the related art. In order to effectively cover a boundary scene, the embodiment of the application provides a DCT module verification method, which comprises the steps of obtaining a limit input matrix and an expected value corresponding to the limit input matrix, wherein the limit input matrix is a pixel value matrix which enables the maximum value of an AC coefficient to appear after DCT conversion of a DCT module, the expected value corresponding to the limit input matrix is the maximum value of the AC coefficient, obtaining a scaling coefficient of the DCT module, inputting the limit input matrix into the DCT module after scaling according to the scaling coefficient, obtaining an output result of the DCT module, calculating a difference value between the output result and a target expected result, and determining whether the calculation precision of the DCT module meets the standard according to the difference value, wherein the target expected result is a value obtained after scaling the expected value corresponding to the limit input matrix according to the scaling coefficient. In the implementation scheme, the pixel value matrix (namely the limit input matrix) of which the maximum value of the alternating current AC coefficient appears after the DCT conversion of the DCT module and the expected value corresponding to the limit input matrix are obtained, and the scaling coefficient of the DCT module is obtained, so that the limit input matrix is scaled according to the scaling coefficient and then is input into the DCT module, and the direct adaptation of the input data and the circuit structure of the DCT module is realized. And then determining whether the calculation accuracy of the DCT module meets the standard according to the difference between the output result of the DCT module and the target expected result obtained after scaling by the scaling coefficient. In this way, the limit input matrix and the expected value corresponding to the limit input matrix can directly verify the limit value for the DCT module, and the limit value represents the boundary scene in the DCT module verification, so that the boundary scene can be directly and effectively covered, and the verification of the worst circuit working state can be realized. In addition, in the above implementation scheme, verification is performed on the worst circuit working state, if verification can be performed on the worst circuit working state, in theory, other scenes can be verified, so that based on the above implementation scheme, random generation of a large number of pictures or capturing of a large number of pictures from the public data set for verification can be omitted, so that verificati