CN-122002794-A - Method for manufacturing semiconductor device

Abstract

A method of manufacturing a semiconductor device may include forming an active pattern on a substrate. Forming the active pattern may include forming first and second line patterns on the substrate, the first and second line patterns extending in a first direction and being spaced apart from each other in a second direction perpendicular to the first direction, selectively forming a protective pattern on the first line pattern, forming an etching pattern on the first and second line patterns, the etching pattern extending in a third direction crossing the first and second directions, and removing a portion of the second line pattern overlapping the etching pattern.

Inventors

• Han Yinzhu
• JIN BINGCHE

Assignees

• 三星电子株式会社

Dates

Publication Date

20260508

Application Date

20250516

Priority Date

20241108

Claims (20)

1. 1. A method of manufacturing a semiconductor device includes forming an active pattern on a substrate, Wherein forming the active pattern includes: forming a first line pattern and a second line pattern on the substrate, the first line pattern and the second line pattern extending in a first direction and being spaced apart from each other in a second direction perpendicular to the first direction; Selectively forming a protective pattern on the first line pattern; forming an etching pattern on the first line pattern and the second line pattern, the etching pattern extending in a third direction crossing the first direction and the second direction, and And removing a portion of the second line pattern overlapping the etching pattern.
2. 2. The method of claim 1, wherein selectively forming the protection pattern comprises: forming a mask layer on the first line pattern and the second line pattern, and Forming the protection pattern on the mask layer, Wherein the protection pattern includes a plurality of openings exposing the mask layer.
3. 3. The method of claim 2, wherein a width of each of the plurality of openings in the third direction is greater than a width of the first line pattern or the second line pattern in the third direction.
4. 4. The method of claim 1, wherein the protection pattern comprises a plurality of protection patterns spaced apart from each other.
5. 5. The method of claim 1, wherein the protection pattern extends in a fourth direction intersecting the first direction and the third direction, and Wherein the fourth direction satisfies the following equation: θ 1 =θ 2 +θ 3 , Wherein θ 1 is an angle between the first direction and the third direction, θ 2 is an angle between the first direction and the fourth direction, θ 3 is an angle between the third direction and the fourth direction, and at least one of θ 2 and θ 3 is an acute angle.
6. 6. The method of claim 1, wherein the angle between the first direction and the third direction ranges from 70 ° to 90 °.
7. 7. A method of manufacturing a semiconductor device includes forming an active pattern on a substrate, Wherein forming the active pattern includes: Forming a line pattern extending in a first direction on the substrate; Forming a protective pattern on the line pattern; Forming an etching pattern on the line pattern, the etching pattern extending in a second direction crossing the first direction and being spaced apart from each other in the first direction, the line pattern including a first portion and a second portion overlapping the etching pattern with the protection pattern therebetween, and The second portion is removed.
8. 8. The method of claim 7, the method further comprising: forming a device isolation pattern between the active patterns; A word line is formed on the active pattern.
9. 9. The method of claim 7, wherein forming the etch pattern is performed by an argon fluoride lithography process.
10. 10. The method of claim 7, wherein forming the protection pattern is performed by an extreme ultraviolet lithography process.
11. 11. The method of claim 7, wherein forming the protection pattern is performed by an argon fluoride lithography process.
12. 12. The method of claim 7, wherein the second portion is exposed from the protection pattern before the second portion is removed.
13. 13. A method of manufacturing a semiconductor device includes forming an active pattern on a substrate, Wherein forming the active pattern includes: Forming a line pattern extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction on the substrate; Forming a protective pattern on the line pattern; Forming an etching pattern extending in a third direction intersecting the first and second directions on the line patterns, each of the line patterns including a first portion and a second portion overlapping the etching pattern, the protection pattern being located between the first portion and the etching pattern, and The second portion is selectively removed.
14. 14. The method of claim 13, wherein forming the protection pattern comprises: Forming a mask layer on the line pattern, and Forming the protection pattern on the mask layer, Wherein the protection pattern includes an opening exposing the mask layer.
15. 15. The method of claim 14, wherein the openings are spaced apart from each other in the first and third directions.
16. 16. The method of claim 14, wherein the opening is provided in a saw tooth shape when viewed in a top view.
17. 17. The method of claim 14, wherein the line pattern has a first pitch in the third direction, Wherein each of the openings has a second pitch in the third direction, an Wherein the second pitch is greater than the first pitch.
18. 18. The method of claim 17, wherein the second pitch is 1.5 to 2.5 times the first pitch.
19. 19. The method of claim 13, wherein the protection pattern includes a plurality of protection patterns extending in a fourth direction and spaced apart from each other, Wherein each of the line patterns has a first pitch in the third direction, Wherein the protective pattern has a second pitch in the third direction, an Wherein the second pitch is greater than the first pitch.
20. 20. The method of claim 19, wherein the second pitch is 1.5 to 2.5 times the first pitch.

Description

Method for manufacturing semiconductor device Technical Field One or more example embodiments of the present disclosure relate to a method of manufacturing a semiconductor device. Background Semiconductor devices play an important role in the electronics industry due to their small size, versatility, and/or low cost. Semiconductor devices are classified into semiconductor memory devices for storing data, semiconductor logic devices for processing data, and hybrid semiconductor devices including both memory elements and logic elements. With the recent trend of high speed and low power consumption of electronic apparatuses, semiconductor devices in electronic apparatuses are required to have high operating speed and/or low operating voltage, and thus, the integration density of semiconductor devices is required to be increased. However, as the integration density of semiconductor devices increases, the semiconductor devices may face problems of deterioration of electrical characteristics and reduction of production yield. Accordingly, research is being conducted to improve the electrical characteristics and the production yield of semiconductor devices. Disclosure of Invention One or more example embodiments of the present disclosure provide a semiconductor device having improved electrical and reliability characteristics and a method of manufacturing the same. In accordance with aspects of example embodiments of the present disclosure, a method of manufacturing a semiconductor device may include forming an active pattern on a substrate. Forming the active pattern may include forming first and second line patterns on the substrate, the first and second line patterns extending in a first direction and being spaced apart from each other in a second direction perpendicular to the first direction, selectively forming a protective pattern on the first line pattern, forming an etching pattern on the first and second line patterns, the etching pattern extending in a third direction crossing the first and second directions, and removing a portion of the second line pattern overlapping the etching pattern. In accordance with aspects of example embodiments of the present disclosure, a method of manufacturing a semiconductor device may include forming an active pattern on a substrate. Forming the active pattern may include forming a line pattern extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction on the substrate, forming a protection pattern on the line pattern, forming an etching pattern extending in a third direction crossing the first direction and the second direction on the line pattern, each of the line patterns including a first portion and a second portion overlapping the etching pattern, the protection pattern being between the first portion and the etching pattern, and selectively removing the second portion. According to aspects of example embodiments of the present disclosure, a method of manufacturing a semiconductor device may include forming a line pattern extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction on the substrate, forming a protection pattern on the line pattern, forming an etching pattern extending in a third direction crossing the first direction and the second direction on the line pattern, each of the line patterns including a first portion and a second portion overlapping the etching pattern, the protection pattern being between the first portion and the etching pattern, and selectively removing the second portion. Drawings The above and other aspects and features of the present disclosure will become more apparent by describing in detail example embodiments thereof with reference to the accompanying drawings. Fig. 1 is a top view illustrating a semiconductor device according to one or more embodiments of the present disclosure. Fig. 2 is an enlarged view illustrating a portion Z of fig. 1. Fig. 3A is a cross-sectional view taken along line A-A' of fig. 2. Fig. 3B is a sectional view taken along line B-B' of fig. 2. Fig. 3C is a sectional view taken along line C-C' of fig. 2. Fig. 3D is a sectional view taken along line D-D' of fig. 2. Fig. 3E is a cross-sectional view taken along line E-E' of fig. 2. Fig. 4, 6, 9, and 13 are enlarged views illustrating methods of manufacturing a semiconductor device according to one or more embodiments of the present disclosure. Fig. 5A, 5B, 7A, 7B, 8A, 8B, 10A, 10B, 11A, 11B, 12A, 12B, 14A, 14B, 15A, and 15B are cross-sectional views illustrating methods of manufacturing a semiconductor device according to one or more embodiments of the present disclosure. Fig. 16, 18, 21, and 25 are enlarged views illustrating methods of manufacturing a semiconductor device according to one or more embodiments of the present disclosure. Fig. 17A, 17B, 19A, 19B, 20A, 20B, 22A, 22B, 23A, 23B, 24A, 24B, 26A, 26B, 27A, and 27B are cr