CN-122002795-A - Semiconductor device with a semiconductor layer having a plurality of semiconductor layers

Abstract

A semiconductor device is provided, including a substrate having an active region formed thereon, a gate stack on the active region, a circuit wiring disposed over the gate stack, and a contact via structure on a side surface of the gate stack and between the active region and the circuit wiring, wherein the contact via structure includes a gate contact via extending between the circuit wiring and the active region, a first contact insulating film covering a portion of a side surface of the gate contact via and exposing a remaining portion of the side surface, and a second contact insulating film covering a portion of a side surface of the first contact insulating film and exposing a remaining portion of the side surface of the gate contact via.

Inventors

• Shen Hongshi
• LU JINGHUAN
• XU YINGZHI
• LIU SHENGHAO
• LI ZHIHUI
• LI XUANZHE

Assignees

• 三星电子株式会社

Dates

Publication Date

20260508

Application Date

20250708

Priority Date

20241106

Claims (20)

1. 1. A semiconductor device, the semiconductor device comprising: A substrate having an active region formed thereon; A gate stack located on the active region; a circuit wiring disposed over the gate stack, and A contact via structure located on a side surface of the gate stack in a first direction, and located between the active region and the circuit wiring, wherein the first direction is parallel to an upper surface of the active region, Wherein the contact via structure comprises: A gate contact via extending between the circuit wiring and the active region along a third direction, the third direction being perpendicular to the upper surface of the active region; A first contact insulating film covering a portion of a side surface of the gate contact via and exposing the remaining portion of the side surface of the gate contact via, and A second contact insulating film covering a portion of a side surface of the first contact insulating film, exposing a remaining portion of the side surface of the first contact insulating film, and exposing the remaining portion of the side surface of the gate contact via.
2. 2. The semiconductor device of claim 1, wherein the contact via structure comprises: a first portion connected to the circuit wiring and including the gate contact via, the first contact insulating film, and the second contact insulating film; A second portion connected to the active region and including the gate contact via, and A third portion located between the first portion and the second portion and including the gate contact via and the first contact insulating film, Wherein the second contact insulating film does not extend into the second portion and the third portion, and the first contact insulating film does not extend into the second portion.
3. 3. The semiconductor device of claim 2, wherein in the first portion of the contact via structure: The first contact insulating film covers the side surface of the gate contact via, and The second contact insulating film covers the side surface of the first contact insulating film.
4. 4. The semiconductor device of claim 2, wherein in the third portion of the contact via structure: The first contact insulating film covers the side surface of the gate contact via, and The second contact insulating film does not cover the side surface of the first contact insulating film.
5. 5. The semiconductor device of claim 2, wherein in the second portion of the contact via structure: the first contact insulating film does not cover the side surface of the gate contact via; the second contact insulating film not covering the side surface of the first contact insulating film, and The gate contact via is exposed.
6. 6. The semiconductor device of claim 2, wherein the second portion of the contact via structure passes through the upper surface of the active region into the active region and contacts the active region.
7. 7. The semiconductor device of claim 2, wherein the semiconductor device further comprises: A gate spacer on the active region and beside the gate stack in the first direction; An interlayer insulating film on the gate spacer and covering the gate stack.
8. 8. The semiconductor device of claim 7, wherein the gate contact via of the contact via structure passes through the gate spacer and an upper surface of the active region into the active region.
9. 9. The semiconductor device according to claim 7, wherein the first contact insulating film extends from the gate spacer to a lower surface of the circuit wiring in the third direction.
10. 10. The semiconductor device of claim 7, wherein the gate spacer is a gate spacer structure, and the gate spacer structure comprises: A first gate spacer on the side surface of the gate stack in the first direction; a second gate spacer on a side surface of the first gate spacer in the first direction; A third of the gate spacers is formed on the substrate, the third gate spacer covers the first gate spacer and the second gate spacer; A fourth gate spacer located under the second gate spacer and the third gate spacer.
11. 11. The semiconductor device of claim 10, wherein: The first contact insulating film is in contact with a first portion of a side surface of the third gate spacer in the first direction; the second contact insulating film is in contact with a second portion of the side surface of the third gate spacer in the first direction; The second contact insulating film is in contact with a portion of a side surface of the interlayer insulating film located on the third gate spacer in the first direction.
12. 12. The semiconductor device according to claim 11, wherein the second contact insulating film extends in the third direction from the side surface of the third gate spacer in the first direction to a lower surface of the circuit wiring.
13. 13. The semiconductor device of claim 10, wherein the gate stack is a first gate stack and the contact via structure is a first contact via structure, the semiconductor device further comprising: a second gate stack spaced apart from the first gate stack in the first direction, and A second contact via structure located outside the first gate stack and the second gate stack, respectively, in the first direction, Wherein the first contact via structure is located between the first gate stack and the second gate stack.
14. 14. The semiconductor device of claim 13, wherein the third portion of the first contact via structure is between the third gate spacer overlying the first gate stack and the third gate spacer overlying the second gate stack.
15. 15. The semiconductor device of claim 13, wherein the third portion of the second contact via structure is interposed between the third gate spacer covering the first gate stack or the second gate stack and the interlayer insulating film.
16. 16. A semiconductor device, the semiconductor device comprising: A substrate having an active region formed thereon; A gate stack located on the active region; a circuit wiring disposed over the gate stack, and A contact via structure located on a side surface of the gate stack in a first direction, the first direction being parallel to an upper surface of the active region, and located between the active region and the circuit wiring; wherein the contact via structure comprises: A first portion connected to the circuit wiring; A second portion connected to the active region, and A third portion, the third portion being located between the first portion and the second portion, Wherein a length of the contact via structure in the first direction has a step between the first portion and the third portion and a step between the third portion and the second portion.
17. 17. The semiconductor device according to claim 16, wherein a length of a lower end of the first portion in the first direction is greater than a length of an upper end of the third portion in the first direction.
18. 18. The semiconductor device according to claim 16, wherein a length of a lower end of the third portion in the first direction is greater than a length of an upper end of the second portion in the first direction.
19. 19. The semiconductor device of claim 16, wherein: The third portion is located on the second portion; The first portion is located on the third portion; the second portion, the third portion, and the first portion are sequentially stacked in a third direction, the third direction being perpendicular to the upper surface of the active region.
20. 20. A semiconductor device, the semiconductor device comprising: A substrate having an active region formed thereon; a circuit wiring formed on the substrate; a first gate stack and a second gate stack located on the active region and spaced apart from each other in a first direction, the first direction being parallel to an upper surface of the active region; a first contact via structure between the first gate stack and the second gate stack and between the active region and the circuit wiring, and Second contact via structures, each of the second contact via structures being located outside the first gate stack and the second gate stack in the first direction and between the active region and the circuit wiring, Wherein: The first contact via structure includes a first gate contact via extending from the active region to the circuit wiring in a third direction perpendicular to the upper surface of the active region, and a contact insulating film on a side surface of the first gate contact via; The second contact via structure includes a gate contact via extending from the active region to the circuit wiring in the third direction, a first contact insulating film covering a portion of a side surface of the gate contact via and exposing a remaining portion of the side surface of the gate contact via, and a second contact insulating film covering a portion of a side surface of the first contact insulating film, exposing a remaining portion of the side surface of the first contact insulating film, and exposing the remaining portion of the side surface of the gate contact via.

Description

Semiconductor device with a semiconductor layer having a plurality of semiconductor layers Technical Field The present disclosure relates to semiconductor devices. Background Semiconductors are materials that have electrical properties between conductors and insulators, and semiconductor materials may be materials that conduct electricity under certain conditions. Various semiconductor devices, such as memory devices, may be fabricated using semiconductor materials. Such semiconductor devices may be used in a variety of electronic apparatuses. As electronic devices become more miniaturized and highly integrated, it is necessary to finely form patterns constituting semiconductor devices. As the widths of these micro-patterns gradually decrease, process difficulty increases, and the defect rate of the semiconductor device may increase. Disclosure of Invention An aspect of the present disclosure provides a semiconductor device capable of improving resistance and performance, preventing a short circuit failure with a gate stack and poor contact with an active region, and reducing contact resistance with the active region by preventing a contact via structure from having an enlarged profile or having a void. A semiconductor device according to one aspect includes a substrate having an active region formed on the substrate, a gate stack on the active region, a circuit wiring disposed over the gate stack, and a contact via structure on a side surface of the gate stack in a first direction and between the active region and the circuit wiring, wherein the first direction is parallel to an upper surface of the active region, wherein the contact via structure includes a gate contact via extending in a third direction between the circuit wiring and the active region, the third direction being perpendicular to the upper surface of the active region, a first contact insulating film covering a portion of a side surface of the gate contact via and exposing a remaining portion of the side surface of the gate contact via, and a second contact insulating film covering a portion of the side surface of the first contact insulating film and exposing a remaining portion of the side surface of the gate contact insulating film. The semiconductor device according to another aspect includes a substrate having an active region formed on the substrate, a gate stack on the active region, a circuit wiring disposed over the gate stack, and a contact via structure on a side surface of the gate stack in a first direction and between the active region and the circuit wiring, the first direction being parallel to an upper surface of the active region, wherein the contact via structure includes a first portion connected to the circuit wiring, a second portion connected to the active region, and a third portion between the first portion and the second portion, wherein a length of the contact via structure in the first direction has a step between the first portion and the third portion, and a step between the third portion and the second portion. A semiconductor device according to another aspect includes a substrate having an active region formed on the substrate; a circuit wiring formed on the substrate; a first gate stack and a second gate stack located on the active region and spaced apart from each other in a first direction, the first direction being parallel to an upper surface of the active region; and a second contact via structure, each of which is located outside the first gate stack and the second gate stack in the first direction and between the active region and the circuit wiring, wherein the first contact via structure includes a first gate contact via extending from the active region to the circuit in a third direction perpendicular to the upper surface of the active region and covering a portion of the side surface of the gate contact via and a contact insulating film located on a side surface of the first gate contact via, and the second contact via structure includes a gate contact via, a first contact insulating film and a second contact insulating film, the gate contact via extending from the active region to the circuit in the third direction and covering a portion of the side surface of the gate contact via and a remaining portion of the side surface of the contact via, the remaining portion of the contact via covering a portion of the side surface of the contact via, the remaining portion of the contact insulating film, A remaining portion of the side surface of the first contact insulating film is exposed, and the remaining portion of the side surface of the gate contact via is exposed. According to the embodiments, a semiconductor device is provided that is capable of improving resistance and performance, preventing a short circuit failure of a gate stack and poor contact with an active region, and reducing contact resistance with the active region by preventing a contact via structure from having an enlarged profile