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CN-122002820-A - Varactor and preparation method thereof

CN122002820ACN 122002820 ACN122002820 ACN 122002820ACN-122002820-A

Abstract

The invention belongs to the technical field of semiconductor power devices, and provides a varactor and a preparation method thereof. The varactor comprises an N+ substrate, an N-epitaxial layer, a first P+ doped region, a second P+ doped region, a dielectric layer, a front metal layer and a back metal layer, wherein the first P+ doped region is annularly arranged above the N-epitaxial layer, the second P+ doped region is circularly arranged above the N-epitaxial layer and is concentrically arranged with the first P+ doped region, the diameter of the second P+ doped region is larger than the outer diameter of the first P+ doped region, the depth of the second P+ doped region is smaller than the depth of the first P+ doped region, the first P+ doped region and the second P+ doped region are formed by two times of injection and annealing, and the injection energy and the injection dosage of the first P+ doped region are both larger than those of the second P+ doped region. According to the invention, as the voltage increases, the depletion layer expands, the depletion layer of the second P+ doped region and the depletion layer of the first P+ doped region tend to have an obvious capacitance reduction effect, so that the capacitance ratio of the varactor is effectively increased.

Inventors

  • LI LANGANG
  • XU TING
  • QI LULU
  • ZHAO CHENGWEN
  • SUN NAN

Assignees

  • 扬州国宇电子有限公司

Dates

Publication Date
20260508
Application Date
20260209

Claims (9)

  1. 1. A kind of variable-capacitance diode, characterized by comprising the following steps: An n+ substrate; The N-epitaxial layer is arranged on the N+ substrate; the first P+ doped region is annularly arranged above the N-epitaxial layer; The second P+ doped region is circularly arranged above the N-epitaxial layer and is concentrically arranged with the first P+ doped region, the diameter of the second P+ doped region is larger than the outer diameter of the first P+ doped region, and the depth of the second P+ doped region is smaller than that of the first P+ doped region; The dielectric layer is arranged on the upper surface of the N-epitaxial layer, a round window is formed in the central area, and the round window, the first P+ doped region and the second P+ doped region are concentrically arranged; The front metal layer is arranged on the N-epitaxial layer and the dielectric layer; And the back metal layer is arranged on the lower surface of the N+ substrate.
  2. 2. The varactor of claim 1, wherein the first p+ doped region has a depth of 4-5 μm and the second p+ doped region has a depth of 2-3 μm.
  3. 3. The varactor of claim 2, in which the diameter of the second p+ doped region and the outer diameter of the first p+ doped region differ by 10-20 μm.
  4. 4. The varactor of claim 3, wherein the first p+ doped region has an inner diameter of 320-340 μm and an outer diameter of 350-360 μm, and the second p+ doped region has a diameter of 380-400 μm.
  5. 5. The varactor of claim 4, wherein the dielectric layer has a thickness of 6500-7500 a.
  6. 6. The preparation method of the varactor is characterized by comprising the following steps: S1, selecting an N+ substrate, and forming an N-epitaxial layer on the N+ substrate; S2, growing a dielectric layer on the N-epitaxial layer; S3, forming an annular window on the dielectric layer through photoetching and dry etching, and performing high-energy B ion injection from the annular window and annealing to form a first P+ doped region; s4, forming a circular window on the dielectric layer through photoetching and etching, and injecting B ions from the circular window in a low energy mode and annealing to form a second P+ doped region, wherein the diameter of the circular window is larger than the outer diameter of the annular window; s5, evaporating the front metal layer and the back metal layer.
  7. 7. The method of claim 6, wherein the first p+ doped region has a B ion implantation energy of 500kev to 900kev, the second p+ doped region has a B ion implantation energy of 10kev to 80kev, and the first p+ doped region and the second p+ doped region are annealed at 900 to 1200 ℃ for 10 to 15 minutes.
  8. 8. The method of claim 7, wherein the first p+ doped region is implanted at a dose of 1e 15-9 e16 cm -2 and the second p+ doped region is implanted at a dose of 5e 12-5 e13 cm -2 .
  9. 9. The method of claim 7, wherein the circular window is formed by photolithography, wet etching.

Description

Varactor and preparation method thereof Technical Field The invention relates to the technical field of semiconductor power devices, in particular to a varactor and a preparation method thereof. Background A Varactor diode (varactors) is an electronic component designed based on the characteristics of a semiconductor PN junction, and has a core function of dynamically adjusting the capacitance of the junction by applying a reverse bias voltage. When a reverse voltage is externally applied, the depletion layer width of the PN junction region may vary with a change in voltage, thereby causing the junction capacitance to exhibit a significant nonlinear variation characteristic. Because of the controllable relationship between the voltage and the capacitance, the varactor has very important and wide application value in Radio Frequency (RF) and microwave circuit systems, for example, plays a key role in high-frequency circuits such as voltage-controlled oscillators, frequency modulators, phase locking loops and the like. In conventional designs, varactors generally improve the tuning range and performance of the capacitor by optimizing internal structural parameters such as doping concentration, junction depth, and material composition, wherein a hyperabrupt junction structure is a typical technical path. The PN junction formed by conventional PN junction injection and annealing mainly extends the junction depth inwards by annealing, but has the disadvantages of being incapable of forming steeper doping concentration gradient and having better directional ductility. However, the current way of further increasing the capacitance adjustment range still faces various challenges. Disclosure of Invention Aiming at the defects in the prior art, the invention provides a varactor and a preparation method thereof, which are used for improving the capacitance adjusting range of the varactor and increasing the capacitance ratio of the varactor. In a first aspect, the present invention provides a varactor diode, including: An n+ substrate; The N-epitaxial layer is arranged on the N+ substrate; the first P+ doped region is annularly arranged above the N-epitaxial layer; The second P+ doped region is circularly arranged above the N-epitaxial layer and is concentrically arranged with the first P+ doped region, the diameter of the second P+ doped region is larger than the outer diameter of the first P+ doped region, and the depth of the second P+ doped region is smaller than that of the first P+ doped region; The dielectric layer is arranged on the upper surface of the N-epitaxial layer, a round window is formed in the central area, and the round window, the first P+ doped region and the second P+ doped region are concentrically arranged; The front metal layer is arranged on the N-epitaxial layer and the dielectric layer; And the back metal layer is arranged on the lower surface of the N+ substrate. Optionally, the depth of the first P+ doped region is 4-5 μm, and the depth of the second P+ doped region is 2-3 μm. Optionally, the diameter of the second p+ doped region and the outer diameter of the first p+ doped region differ by 10-20 μm. Optionally, the first P+ doped region has an inner diameter of 320-340 μm and an outer diameter of 350-360 μm, and the second P+ doped region has a diameter of 380-400 μm. Optionally, the thickness of the dielectric layer is 6500-7500 a. In a second aspect, the present invention provides a method for manufacturing a varactor, including: S1, selecting an N+ substrate, and forming an N-epitaxial layer on the N+ substrate; S2, growing a dielectric layer on the N-epitaxial layer; S3, forming an annular window on the dielectric layer through photoetching and dry etching, and performing high-energy B ion injection from the annular window and annealing to form a first P+ doped region; s4, forming a circular window on the dielectric layer through photoetching and etching, and injecting B ions from the circular window in a low energy mode and annealing to form a second P+ doped region, wherein the diameter of the circular window is larger than the outer diameter of the annular window; s5, evaporating the front metal layer and the back metal layer. Optionally, the B ion implantation energy of the first p+ doped region is 500kev to 900kev, the B ion implantation energy of the second p+ doped region is 10kev to 80kev, and the annealing activation temperature after the first p+ doped region and the second p+ doped region are implanted is 900 ℃ to 1200 ℃ for 10 min to 15min. Optionally, the implantation dose of the first p+ doped region is 1e15 to 9e16 cm -2, and the implantation dose of the second p+ doped region is 5e12 to 5e13 cm -2. Alternatively, the circular window is formed by photolithography, wet etching. By adopting the technical scheme, the application has the following beneficial effects: (1) According to the varactor provided by the invention, the injection depth of the first P+ doped region c