CN-122002822-A - MIM capacitor and preparation method thereof

Abstract

The application provides a MIM capacitor and a preparation method thereof, wherein in the preparation method, after a lower polar plate material layer is formed and before an intermediate dielectric layer is formed, a chemical mechanical polishing process is adopted to polish and remove a part of the lower polar plate material layer in thickness so as to planarize the surface of the lower polar plate material layer, thereby improving the flatness of the whole MIM capacitor, improving the breakdown voltage of the MIM capacitor, reducing the leakage current of a device and improving the failure time (service life) of a TDDB of the device.

Inventors

• YAN JIAXIANG
• GU XIN
• LI JIALONG
• ZHANG DONG
• WANG HAN

Assignees

• 华虹半导体(无锡)有限公司

Dates

Publication Date

20260508

Application Date

20260107

Claims (10)

1. 1. A method of fabricating a MIM capacitor comprising: Providing a substrate, wherein a liner oxide layer is formed on the substrate; Forming a lower electrode plate material layer, wherein the lower electrode plate material layer covers the liner oxide layer; Grinding and removing part of the thickness of the lower electrode plate material layer by adopting a chemical mechanical grinding process so as to planarize the surface of the lower electrode plate material layer; Forming an intermediate dielectric layer, wherein the intermediate dielectric layer covers the lower electrode plate material layer with the residual thickness; Forming an upper plate material layer, wherein the upper plate material layer covers the intermediate dielectric layer; Forming a first hard mask layer, wherein the first hard mask layer covers the upper polar plate material layer; etching part of the first hard mask layer and part of the upper electrode plate material layer and stopping on the surface of the intermediate dielectric layer; Forming a second hard mask layer, wherein the second hard mask layer covers the rest of the first hard mask layer, the rest of the side surface of the upper polar plate material layer and the intermediate dielectric layer; Etching part of the second hard mask layer, part of the intermediate dielectric layer and part of the lower electrode plate material layer on the upper electrode plate material layer side and stopping on the surface of the liner oxide layer; And forming an interlayer dielectric layer, wherein the interlayer dielectric layer covers the remaining second hard mask layer, the remaining side surface of the intermediate dielectric layer, the remaining side surface of the lower polar plate material layer and the liner oxide layer.
2. 2. The method of claim 1, wherein the lower plate material layer is formed using an ALD process.
3. 3. The method of claim 1, wherein the thickness of the lower plate material layer removed by polishing is 50-150 angstroms in the process of removing a part of the thickness of the lower plate material layer by chemical mechanical polishing.
4. 4. The method of claim 1, wherein the thickness of the bottom plate material layer is between 450 angstroms and 750 angstroms prior to the removal of a portion of the bottom plate material layer by chemical mechanical polishing.
5. 5. The method of claim 1, wherein the upper plate material layer is formed using an ALD process.
6. 6. The method of claim 1, wherein the upper plate material layer has a thickness of 400-600 a.
7. 7. The method of claim 1, wherein the lower plate material layer is made of titanium nitride, the intermediate dielectric layer is made of Al 2 O 3 , and the upper plate material layer is made of titanium nitride.
8. 8. The method of claim 1, wherein the liner oxide layer has a thickness of 1000 a to 10000 a.
9. 9. The method of fabricating a MIM capacitor according to claim 1, wherein after forming the interlayer dielectric layer, the method of fabricating a MIM capacitor further comprises: And forming a first conductive plug and a second conductive plug, wherein the first conductive plug penetrates through the interlayer dielectric layer, the second hard mask layer and the first hard mask layer and is in contact with the upper polar plate material layer, and the second conductive plug penetrates through the interlayer dielectric layer, the second hard mask layer and the middle dielectric layer and is in contact with the lower polar plate material layer.
10. 10. A MIM capacitor, comprising: a substrate on which a pad oxide layer is formed; A lower electrode plate material layer covering a part of the surface of the pad oxide layer; an intermediate dielectric layer covering the lower electrode plate material layer, wherein, before forming the intermediate dielectric layer, part of the thickness of the lower electrode plate material layer is polished and removed by adopting a chemical mechanical polishing process so as to planarize the surface of the lower electrode plate material layer; an upper plate material layer covering a portion of a surface of the intermediate dielectric layer; A first hard mask layer covering the upper plate material layer; A second hard mask layer covering the first hard mask layer, the upper plate material layer side surface, and the intermediate dielectric layer; and the interlayer dielectric layer covers the second hard mask layer, the side surface of the intermediate dielectric layer, the side surface of the lower polar plate material layer and the liner oxide layer.

Description

MIM capacitor and preparation method thereof Technical Field The application relates to the technical field of semiconductor manufacturing, in particular to an MIM capacitor and a preparation method thereof. Background With the development of large-scale integrated circuits, the chip area and the feature size are continuously reduced, crosstalk is easily formed by the metal wiring resistance and the insulating layer capacitance inside the device, and development barriers exist in aspects of power consumption, delay and the like, so that a time-dependent dielectric breakdown (TDDB) problem is gradually one of the most serious reliability problems. Among MIM (Metal-Insulator-Metal) capacitors, a high dielectric constant MIM capacitor is attracting attention because of its large capacitance per unit area and small occupied area. However, the high-dielectric-constant MIM capacitor of the prior art has the problems of larger leakage current, lower breakdown voltage, and shortened failure time (lifetime) of TDDB, thereby restricting the application to a wider range. Disclosure of Invention The application provides an MIM capacitor and a preparation method thereof, which can solve the problems of larger leakage current, lower breakdown voltage, shortened failure time (service life) of TDDB and the like of a high-dielectric-constant MIM capacitor. In one aspect, an embodiment of the present application provides a method for manufacturing a MIM capacitor, including: Providing a substrate, wherein a liner oxide layer is formed on the substrate; Forming a lower electrode plate material layer, wherein the lower electrode plate material layer covers the liner oxide layer; Grinding and removing part of the thickness of the lower electrode plate material layer by adopting a chemical mechanical grinding process so as to planarize the surface of the lower electrode plate material layer; Forming an intermediate dielectric layer, wherein the intermediate dielectric layer covers the lower electrode plate material layer with the residual thickness; Forming an upper plate material layer, wherein the upper plate material layer covers the intermediate dielectric layer; Forming a first hard mask layer, wherein the first hard mask layer covers the upper polar plate material layer; etching part of the first hard mask layer and part of the upper electrode plate material layer and stopping on the surface of the intermediate dielectric layer; Forming a second hard mask layer, wherein the second hard mask layer covers the rest of the first hard mask layer, the rest of the side surface of the upper polar plate material layer and the intermediate dielectric layer; Etching part of the second hard mask layer, part of the intermediate dielectric layer and part of the lower electrode plate material layer on the upper electrode plate material layer side and stopping on the surface of the liner oxide layer; And forming an interlayer dielectric layer, wherein the interlayer dielectric layer covers the remaining second hard mask layer, the remaining side surface of the intermediate dielectric layer, the remaining side surface of the lower polar plate material layer and the liner oxide layer. Optionally, in the method for manufacturing the MIM capacitor, the lower electrode plate material layer is formed by an ALD process. Optionally, in the preparation method of the MIM capacitor, a chemical mechanical polishing process is used to polish and remove a portion of the thickness of the lower electrode plate material layer, where the thickness of the lower electrode plate material layer removed by polishing is 50-150 angstroms. Optionally, in the method for manufacturing the MIM capacitor, before the lower plate material layer with a partial thickness is removed by chemical mechanical polishing, the thickness of the lower plate material layer is 450 angstrom to 750 angstrom. Optionally, in the method for manufacturing the MIM capacitor, the upper electrode plate material layer is formed by an ALD process. Optionally, in the method for manufacturing the MIM capacitor, the thickness of the upper electrode plate material layer is 400 to 600 angstroms. Optionally, in the method for manufacturing the MIM capacitor, the material of the lower electrode plate material layer is titanium nitride, the material of the intermediate dielectric layer is Al 2O3, and the material of the upper electrode plate material layer is titanium nitride. Optionally, in the method for manufacturing the MIM capacitor, the thickness of the pad oxide layer is 1000 a to 10000 a. Optionally, in the method for manufacturing the MIM capacitor, after forming the interlayer dielectric layer, the method for manufacturing the MIM capacitor further includes: And forming a first conductive plug and a second conductive plug, wherein the first conductive plug penetrates through the interlayer dielectric layer, the second hard mask layer and the first hard mask layer and is in contact with the up