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CN-122002831-A - Trench MOSFET device and manufacturing method thereof

CN122002831ACN 122002831 ACN122002831 ACN 122002831ACN-122002831-A

Abstract

The application discloses a trench MOSFET device and a manufacturing method thereof, wherein the manufacturing method comprises the steps of providing a substrate with an epitaxial layer of a first doping type formed on the upper surface; forming a base region with a second doping type in the epitaxial layer, forming a well region and a source region with sides connected to the base region in the epitaxial layer, etching the epitaxial layer to form a groove connected to the base region, sequentially forming a first implantation buried layer with a first doping type and a second implantation buried layer with a second doping type at the bottom of the groove, depositing polysilicon in the groove to form a grid, forming a source metal layer connected with the base region and the source region on the upper surface of the epitaxial layer, and forming the source metal layer in the hole of the polysilicon to enable the source metal layer to penetrate through the well region and the source region and be connected with the second implantation buried layer. The application can effectively solve the problem caused by charge storage/accumulation effect and make the device not easily affected by the groove, and the design window and the process window of the device can be larger.

Inventors

  • REN WEIQIANG

Assignees

  • 深圳真茂佳半导体有限公司

Dates

Publication Date
20260508
Application Date
20241108

Claims (10)

  1. 1. A method of fabricating a trench MOSFET device comprising the steps of: S10, providing a substrate (10), wherein an epitaxial layer (20) of a first doping type is formed on the upper surface of the substrate (10); S20, implanting ions into the epitaxial layer (20) for the first time to form a plurality of base regions (30) with a second doping type in the epitaxial layer (20); S30, implanting ions into the epitaxial layer (20) for the second time to form a well region and a source region (42) in the epitaxial layer (20), wherein the sides of the well region and the source region (42) are connected with the base region (30); s40, etching the epitaxial layer (20) to form a groove (21) penetrating the well region and the source region (42), wherein the groove (21) is not connected with the base region (30); S50, implanting ions into the epitaxial layer (20) for the third time to sequentially form a first implantation buried layer (50) and a second implantation buried layer (51) at the bottom of the groove (21), wherein the first implantation buried layer (50) is of a first doping type, the second implantation buried layer (51) is of a second doping type different from the first doping type, and the first implantation buried layer (50) and the second implantation buried layer (51) are not connected with the base region (30); S60, depositing polycrystalline silicon into the groove (21) to form a grid electrode (70), wherein the polycrystalline silicon is provided with a hole (20); And S70, forming a source metal layer (80) on the upper surface of the epitaxial layer (20) so as to connect the base region (30) and the source region (42), wherein the source metal layer (80) is also formed in the hole (20) of the polysilicon, so that the source metal layer (80) passes through the well region and the source region (42) and is connected to the second buried implant layer (51).
  2. 2. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S50 comprises: S51, forming a mask (60) on the upper surface of the epitaxial layer (20), wherein the mask (60) also covers the side wall of the groove (21); S52, implanting ions to form a first buried implantation layer (50) in the bottom of the groove (21), wherein the first buried implantation layer (50) is of a structure with a thin middle and thick two sides by controlling implantation angles; s53, implanting ions to form a second buried implant layer (51), wherein the second buried implant layer (51) is annularly distributed in the first buried implant layer (50) through vertical implantation.
  3. 3. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S50 comprises: S51, forming a mask (60) on the upper surface of the epitaxial layer (20), wherein the mask (60) also covers the side wall of the groove (21); s52, implanting ions to form a first buried implant layer (50) in the bottom of the groove (21), wherein the first buried implant layer (50) is annularly distributed through vertical implantation; s53, implanting ions to form a second buried implant layer (51), wherein the second buried implant layer (51) is annularly distributed in the first buried implant layer (50) through vertical implantation.
  4. 4. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S50 comprises: S51, forming a mask (60) on the upper surface of the epitaxial layer (20), wherein the mask (60) also covers the side wall of the groove (21); S52, implanting ions to form a first buried implantation layer (50) in the bottom of the groove (21), wherein the first buried implantation layer (50) is of a structure with a thin middle and thick two sides by controlling implantation angles; S53, implanting ions to form a second implantation buried layer (51) in the first implantation buried layer (50), wherein the second implantation buried layer (51) is of a structure with a thick middle part and thin two sides through vertical implantation, and the middle part of the second implantation buried layer (51) penetrates through the middle part of the first implantation buried layer (50) and is in contact with the epitaxial layer (20).
  5. 5. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S50 comprises: s51, forming a first mask on the upper surface of the epitaxial layer (20), wherein the first mask also covers the side wall of the groove (21); S52, implanting ions to form a first buried implantation layer (50) in the bottom of the groove (21), wherein the first buried implantation layer (50) is of a structure with a thin middle and thick two sides by controlling implantation angles; S53, forming a second mask on the upper surface of the epitaxial layer (20), wherein the first mask also covers the side wall of the groove (21), and the opening of the second mask is smaller than that of the first mask; S54, ions are injected through the second mask to form a second injection buried layer (51) in the first injection buried layer (50), the second injection buried layer (51) is of a cuboid structure with uniform thickness through vertical injection, and the middle part of the second injection buried layer (51) penetrates through the first injection buried layer (50) and is in contact with the epitaxial layer (20).
  6. 6. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S30 comprises: s31, implanting ions into the epitaxial layer (20) to form a first channel region (40) with a second doping type; S32, implanting ions into the epitaxial layer (20) to form a second channel region (41) of a first doping type, wherein the first channel region (40) and the second channel region (41) are combined to form a well region; S33, implanting ions into the epitaxial layer (20) to form a source region (42) of a first doping type; The doping concentration of the base region (30) is higher than that of the first channel region (40), and the doping concentration of the second channel region (41) is lower than that of the source region (42), so that an internal negative feedback resistor between the first channel region (40) and the source region (42) is formed, and gate-source voltage withstand and partial pressure are achieved.
  7. 7. The method of manufacturing a trench MOSFET device according to claim 1, wherein step S70 comprises: S71, forming an insulating layer (72) in the hole (20) and on the upper surface of the epitaxial layer (20); S72, forming a mask (60) on the upper surface of the insulating layer (72), etching the insulating layer (72) above the base region (30) and the source region (42) to form a contact hole (73), and etching the insulating layer (72) in the groove (21) to form a grounding hole (74); s73, filling metal in the contact hole (73) and the grounding hole (74) to form a source metal layer (80), wherein the source metal layer (80) is connected with the base region (30) and the source region (42) and is connected with the second buried implant layer (51) through the well region and the source region (42).
  8. 8. The method of manufacturing a trench MOSFET device according to claim 7, further comprising, prior to step S73: and S730, depositing metal at the bottom of the contact hole (73) and the bottom of the grounding hole (74) to form a conductive layer (75).
  9. 9. A trench MOSFET device, comprising: A substrate (10); an epitaxial layer (20) of a first doping type formed on the upper surface of the substrate (10); -a plurality of base regions (30) of a second doping type, arranged within said epitaxial layer (20); A well region and a source region (42) arranged in the epitaxial layer (20), wherein the sides of the well region and the source region (42) are connected with the base region (30); a gate (70) disposed between the base regions (30) and having a bottom end of the gate (70) penetrating the well region and the source region (42); A first buried implant layer (50) and a second buried implant layer (51) formed at the bottom end of the gate (70), wherein the first buried implant layer (50) and the second buried implant layer (51) are not connected to the base region (30), the first buried implant layer (50) is of a first doping type, and the second buried implant layer (51) is of a second doping type different from the first doping type; And a source metal layer (80) formed on the upper surface of the epitaxial layer (20) so as to connect the base region (30) and the source region (42), wherein the source metal layer (80) also penetrates through the well region and the source region (42) and is connected to the second buried implant layer (51).
  10. 10. A trench MOSFET device according to claim 9, wherein the first buried implant layer (50) has a structure with a thin middle and thick sides, and the second buried implant layer (51) is annularly distributed; Or, the first buried implant layers (50) are annularly distributed, and the second buried implant layers (51) are annularly distributed; Or, the first buried implant layer (50) is of a structure with a thin middle part and thick two sides, the second buried implant layer (51) is of a structure with a thick middle part and thin two sides, and the middle part of the second buried implant layer (51) penetrates through the middle part of the first buried implant layer (50) and is in contact with the epitaxial layer (20); Or, the first buried implant layer (50) is of a structure with a thin middle and thick two sides, the second buried implant layer (51) is of a cuboid structure with uniform thickness, and the middle part of the second buried implant layer (51) penetrates through the first buried implant layer (50) and is in contact with the epitaxial layer (20).

Description

Trench MOSFET device and manufacturing method thereof Technical Field The application relates to the field of semiconductor power devices, in particular to a trench MOSFET device and a manufacturing method thereof. Background Trench Mosfet (Trench type) Metal oxide semiconductor a field effect transistor) is a transistor structure, it is an advanced technology developed on the basis of the conventional Planar Mosfet (Planar metal oxide semiconductor field effect transistor). The Trench MOS technology is used for realizing higher integration and better electrical performance by etching a deep Trench on the surface of a semiconductor material and forming a transistor on the side wall of the Trench. The grid electrode is buried into the matrix by the Trench Mosfet to form a vertical channel, and compared with the Planar Mosfet, the occupied area of the grid electrode is reduced, the unit cell size (CELL PITCH) can be made smaller, the area occupied ratio of the chip flowing current is increased, and the area of the chip is more fully utilized. And the same chip area and the smaller cell size can be used for connecting more cells in parallel, so that the unit density of a unit cell and a channel is improved, and the on-resistance is reduced. The width of the gate of the Trench mosfet is far smaller than that of the planar structure, the parasitic gate drain capacitance Cgd, namely the reverse transmission capacitance (miller capacitance), is greatly reduced, and the switching loss is greatly reduced. However, under the high drain voltage, a large electric field exists at the bottom of the trench, which is easy to break down, and the voltage resistance and reliability of the device are affected. In the related art, a patent with publication number CN111755525A discloses a Trench MOS power device and a preparation method thereof, and relates to the technical field of semiconductor power devices. The method is used for reducing the on-resistance of the device and simultaneously can effectively ensure the breakdown voltage. The semiconductor device comprises an epitaxial layer, a gate groove and an injection buried layer, wherein the gate groove is arranged on the epitaxial layer, the injection buried layer is positioned right below the gate groove and is in contact with the bottom and the side wall of the gate groove, and the injection buried layer comprises an N-type buried layer and a P-type buried layer. In addition, after the device is repeatedly switched, charge accumulation is formed at the injection buried layer, so that the electric field distribution in the device is affected, and the overall performance of the device is reduced. Disclosure of Invention The application provides a trench MOSFET device and a manufacturing method thereof in order to improve the compression resistance of the device and prolong the service life of the device. The manufacturing method of the trench MOSFET device provided by the first aspect of the application adopts the following technical scheme: A method of fabricating a trench MOSFET device comprising the steps of: s10, providing a substrate, wherein an epitaxial layer of a first doping type is formed on the upper surface of the substrate; s20, implanting ions into the epitaxial layer for the first time to form a plurality of base regions with a second doping type in the epitaxial layer; S30, implanting ions into the epitaxial layer for the second time to form a well region and a source region in the epitaxial layer, wherein the sides of the well region and the source region are connected with the base region; S40, etching the epitaxial layer to form a groove penetrating through the well region and the source region, wherein the groove is not connected with the base region; S50, implanting ions into the epitaxial layer for the third time to sequentially form a first implanted buried layer and a second implanted buried layer at the bottom of the groove, wherein the first implanted buried layer is of a first doping type, the second implanted buried layer is of a second doping type different from the first doping type, and the first implanted buried layer and the second implanted buried layer are not connected with the base region; S60, depositing polysilicon into the groove to form a grid, wherein the polysilicon is provided with a hole; And S70, forming a source electrode metal layer on the upper surface of the epitaxial layer so as to connect the base region and the source region, wherein the source electrode metal layer is also formed in the hole of the polysilicon, so that the source electrode metal layer penetrates through the well region and the source region to be connected to the second buried implantation layer. By adopting the technical scheme, the P-type and N-type regions at the bottom of the groove with a unique structure are formed, the on-resistance of the device is effectively reduced, and the voltage-withstanding capability and reliability of the device are im