CN-122002855-A - Semiconductor device and method for manufacturing the same

Abstract

The invention provides a semiconductor device and a method for manufacturing the same. The semiconductor device may include a substrate, a channel layer having a fin shape and protruding from the substrate in a first direction perpendicular to an upper surface of the substrate, an external gate electrode on a first side surface of the channel layer, a second side surface of the channel layer opposite to the first side surface, and an upper surface of the channel layer, and an internal gate electrode contacting a lower surface of the channel layer, wherein the internal gate electrode includes a material different from a material of the external gate electrode.

Inventors

• JIN DEHUAN
• Jin Chengmen
• Jin Zaiming
• JIN ZHENGJIE
• LI YONGJING

Assignees

• 三星电子株式会社

Dates

Publication Date

20260508

Application Date

20251014

Priority Date

20241107

Claims (20)

1. 1. A semiconductor device, comprising: A substrate; a channel layer having a fin shape and protruding from the substrate in a first direction perpendicular to an upper surface of the substrate; An external gate electrode on a first side surface of the channel layer, a second side surface of the channel layer opposite to the first side surface, and an upper surface of the channel layer, and An internal gate electrode contacting a lower surface of the channel layer, Wherein the inner gate electrode comprises a material different from a material of the outer gate electrode.
2. 2. The semiconductor device of claim 1, wherein the material of the inner gate electrode is etch selective with respect to the outer gate electrode.
3. 3. The semiconductor device of claim 1, wherein the material of the inner gate electrode and the material of the outer gate electrode comprise at least one of a metal, a metal nitride, a metal oxide, and doped polysilicon.
4. 4. The semiconductor device of claim 1, wherein the external gate electrode comprises a first conductive layer on the channel layer and a second conductive layer on the first conductive layer.
5. 5. The semiconductor device according to claim 1, wherein the channel layer comprises a group IV semiconductor, a group III-V compound semiconductor, an oxide semiconductor, a nitride semiconductor, an oxynitride semiconductor, a two-dimensional semiconductor, a quantum dot, or an organic semiconductor.
6. 6. The semiconductor device of claim 1, wherein the internal gate electrode comprises: an inner conductive layer comprising a material different from the material of the outer gate electrode, and A barrier layer on an upper surface of the inner conductive layer and a lower surface of the inner conductive layer.
7. 7. A semiconductor device, comprising: A substrate; A first unit device on the substrate, and A second unit device on the substrate and spaced apart from the first unit device, Wherein each of the first unit device and the second unit device includes: a channel layer having a fin shape and protruding from the substrate in a first direction perpendicular to an upper surface of the substrate; An external gate electrode on a first side surface of the channel layer, a second side surface of the channel layer opposite to the first side surface, and an upper surface of the channel layer, and An internal gate electrode contacting the lower surface of the channel layer, an Wherein the inner gate electrode comprises a material different from a material of the outer gate electrode.
8. 8. The semiconductor device of claim 7, wherein the material of the inner gate electrode of each of the first and second unit devices has an etch selectivity with respect to the outer gate electrode.
9. 9. The semiconductor device according to claim 7, wherein a thickness of the external gate electrode of the first unit device is different from a thickness of the external gate electrode of the second unit device in a second direction perpendicular to the first direction.
10. 10. The semiconductor device of claim 7, wherein the external gate electrode of each of the first and second unit devices comprises a first conductive layer on the channel layer and a second conductive layer on the first conductive layer.
11. 11. The semiconductor device according to claim 10, wherein a thickness of the first conductive layer of the first unit device is different from a thickness of the first conductive layer of the second unit device in a second direction perpendicular to the first direction.
12. 12. The semiconductor device of claim 7, wherein the material of the inner gate electrode and the material of the outer gate electrode of each of the first and second unit devices comprises at least one of a metal, a metal nitride, a metal oxide, and doped polysilicon.
13. 13. The semiconductor device according to claim 7, wherein the channel layer of each of the first unit device and the second unit device comprises a group IV semiconductor, a group III-V compound semiconductor, an oxide semiconductor, a nitride semiconductor, an oxynitride semiconductor, a two-dimensional semiconductor, a quantum dot, or an organic semiconductor.
14. 14. The semiconductor device according to claim 7, wherein the internal gate electrode of each of the first unit device and the second unit device comprises: an inner conductive layer comprising a material different from the material of the outer gate electrode, and A barrier layer on an upper surface of the inner conductive layer and a lower surface of the inner conductive layer.
15. 15. A method of manufacturing a semiconductor device, the method comprising: Forming a first channel layer and a second channel layer extending in a first direction perpendicular to an upper surface of a substrate on the substrate; Forming a first through hole in a lower portion of the first channel layer and a second through hole in a lower portion of the second channel layer; Forming a first internal gate electrode filling the first through hole and a second internal gate electrode filling the second through hole; Forming a first external gate material layer on the substrate, the first external gate material layer covering the first channel layer, the first internal gate electrode, the second channel layer, and the second internal gate electrode; Selectively etching and removing the region of the first outer gate material layer covering the first channel layer and the first inner gate electrode, and Forming a second outer gate material layer on the first channel layer, the first inner gate electrode, and the first outer gate material layer covering the second channel layer and the second inner gate electrode, Wherein the first and second outer gate material layers form a first outer gate electrode over the first channel layer and the first inner gate electrode, and the second outer gate material layer forms a second outer gate electrode over the second channel layer and the second inner gate electrode, an Wherein the first internal gate electrode comprises a material different from that of the first external gate electrode, and the second internal gate electrode comprises a material different from that of the second external gate electrode.
16. 16. The method of claim 15, wherein a thickness of the second external gate electrode is different from a thickness of the first external gate electrode.
17. 17. The method of claim 15, wherein the first and second through holes are formed in a second direction perpendicular to the first direction.
18. 18. The method of claim 15, wherein forming the first and second internal gate electrodes comprises: Forming an internal gate material layer in each of the first and second channel layers to fill the first and second through holes, and The internal gate material layer is partially etched and removed such that the internal gate material layer remains only in the first and second through holes.
19. 19. The method of claim 18, wherein the inner gate material layer comprises a material having an etch selectivity relative to the first outer gate material layer.
20. 20. The method of claim 15, wherein the first internal gate electrode comprises a first internal conductive layer comprising a material different from the material of the first external gate electrode and a barrier layer on an upper surface of the first internal conductive layer and a lower surface of the first internal conductive layer, and Wherein the second internal gate electrode includes a second internal conductive layer including a material different from the material of the second external gate electrode and a barrier layer on an upper surface of the second internal conductive layer and a lower surface of the second internal conductive layer.

Description

Semiconductor device and method for manufacturing the same Technical Field The present disclosure relates to semiconductor devices and methods of manufacturing the same. Background In a semiconductor device such as a fin field effect transistor (FinFET), a channel may be formed in a fin shape protruding vertically from a substrate, and a gate electrode may surround three sides of the channel. A semiconductor device having such a three-dimensional shape can exhibit high performance and achieve high integration density. The information disclosed in this background section is already known to or derived from the inventors before or during the course of carrying out the embodiments of the application or is technical information obtained in carrying out the embodiments. It may therefore contain information that does not constitute prior art already known to the public. Disclosure of Invention A semiconductor device and a method of manufacturing the same are provided. Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the presented embodiments of the disclosure. According to one aspect of the present disclosure, a semiconductor device includes a substrate, a channel layer having a fin shape and protruding from the substrate in a first direction perpendicular to an upper surface of the substrate, an external gate electrode on a first side surface of the channel layer, a second side surface of the channel layer opposite to the first side surface, and an upper surface of the channel layer, and an internal gate electrode contacting a lower surface of the channel layer, wherein the internal gate electrode includes a material different from a material of the external gate electrode. The material of the inner gate electrode may have an etch selectivity with respect to the outer gate electrode. The material of the inner gate electrode and the material of the outer gate electrode may include at least one of metal, metal nitride, metal oxide, and doped polysilicon. The external gate electrode may include a first conductive layer on the channel layer and a second conductive layer on the first conductive layer. The channel layer may include a group IV semiconductor, a group III-V compound semiconductor, an oxide semiconductor, a nitride semiconductor, an oxynitride semiconductor, a two-dimensional semiconductor, a quantum dot, or an organic semiconductor. The inner gate electrode may include an inner conductive layer including a material different from that of the outer gate electrode, and a barrier layer on an upper surface of the inner conductive layer and a lower surface of the inner conductive layer. According to an aspect of the present disclosure, a semiconductor device includes a substrate, a first unit device on the substrate, and a second unit device on the substrate and spaced apart from the first unit device, wherein each of the first unit device and the second unit device may include a channel layer having a fin shape and protruding from the substrate in a first direction perpendicular to an upper surface of the substrate, an external gate electrode on a first side surface of the channel layer, a second side surface of the channel layer opposite to the first side surface, and an upper surface of the channel layer, and an internal gate electrode contacting a lower surface of the channel layer, wherein the internal gate electrode includes a material different from a material of the external gate electrode. The material of the inner gate electrode of each of the first and second unit devices may have an etch selectivity with respect to the outer gate electrode. In a second direction perpendicular to the first direction, the thickness of the external gate electrode of the first unit device is different from the thickness of the external gate electrode of the second unit device. The external gate electrode of each of the first and second unit devices may include a first conductive layer on the channel layer and a second conductive layer on the first conductive layer. In a second direction perpendicular to the first direction, the thickness of the first conductive layer of the first unit device is different from the thickness of the first conductive layer of the second unit device. The material of the inner gate electrode and the material of the outer gate electrode of each of the first and second unit devices may include at least one of metal, metal nitride, metal oxide, and doped polysilicon. The channel layer of each of the first and second unit devices may include a group IV semiconductor, a group III-V compound semiconductor, an oxide semiconductor, a nitride semiconductor, an oxynitride semiconductor, a two-dimensional semiconductor, a quantum dot, or an organic semiconductor. The inner gate electrode of each of the first and second unit devices may include an inner conductive layer including a material