CN-122002858-A - LDMOS device and manufacturing method thereof

CN122002858ACN 122002858 ACN122002858 ACN 122002858ACN-122002858-A

Abstract

The application provides an LDMOS device and a manufacturing method thereof, and relates to the technical field of semiconductors. The LDMOS device comprises a semiconductor substrate, a drift region which is arranged on the semiconductor substrate and provided with a first conductive type, a body region which is arranged at one end of the drift region and provided with a second conductive type, a grid structure which is arranged on the surface of the body region and partially extends to the upper side of the drift region, a source region which is arranged in the body region and is adjacent to one side of the grid structure, a body contact region which is adjacent to the source region and is of the second conductive type, a drain region which is arranged at one end of the drift region far away from the body region, and a plurality of strip-shaped current modulation units which are arranged in the drift region in an interdigital alternate arrangement mode and extend along the direction of the body region to the drain region. The application has the advantages of lower cost, smaller whole chip area and easier manufacture.

Inventors

HUANG TENGCHENG
ZHANG HAIBO
CHEN ZONGGAO
GU LIANGZHI

Assignees

广州增芯科技有限公司

Dates

Publication Date: 20260508
Application Date: 20260211

Claims (10)

1. An LDMOS device, characterized in that the LDMOS device comprises: A semiconductor substrate; A drift region located on the semiconductor substrate and having a first conductivity type; A body region located at one end of the drift region and having a second conductivity type, the body region being contiguous with the drift region, the first conductivity type being opposite the second conductivity type; A gate structure located on the surface of the body region and extending partially over the drift region; a source region of a first conductivity type located within the body region and immediately adjacent to a side of the gate structure, and a body contact region of a second conductivity type adjacent to the source region; a drain region of the first conductivity type located at an end of the drift region remote from the body region; the strip-shaped current modulation units are arranged in the drift region in an interdigital alternative arrangement mode, and are arranged in an extending mode along the direction of the body region to the drain region.
2. The LDMOS device of claim 1, wherein the current modulating unit is disposed obliquely in a direction from the body region toward the drain region, and an angle of inclination ranges from 0 ° to 45 °.
3. The LDMOS device of claim 2, wherein the tilt angle is in the range of 15 ° to 30 °.
4. The LDMOS device of claim 2, wherein the angle of inclination of the current modulating unit closer to the body region is greater than the angle of inclination of the current modulating unit farther from the body region.
5. The LDMOS device of claim 2, wherein the tilt angle of the current modulating unit gradually decreases in a direction along the body region toward the drain region.
6. The LDMOS device of claim 1, wherein the current modulating unit is a semiconductor region having a second conductivity type, and the current modulating unit forms a PN junction with the drift region.
7. The LDMOS device of claim 1, wherein the current modulating unit is a trench filled with a dielectric.
8. The LDMOS device of claim 7, wherein the dielectric comprises silicon dioxide or a porous medium.
9. The LDMOS device of claim 1, wherein the end of the current modulating unit is rounded or rounded.
10. A method for fabricating an LDMOS device according to any of claims 1 to 9, the method comprising: providing a semiconductor substrate and forming a drift region of a first conductivity type; Forming a body region of a second conductivity type at one end of the drift region; Forming a plurality of strip-shaped current modulation units and a body contact region of a second conductivity type in the drift region, wherein the current modulation units are alternately arranged in an interdigital manner and extend along a direction from the body region to the drain region; Forming a gate structure on the surface of the body region, wherein the gate structure part extends to the upper part of the drift region; Forming a source region of a first conductivity type and a body contact region of a second conductivity type within the body region; A drain region of the first conductivity type is formed at an end of the drift region remote from the body region.

Description

LDMOS device and manufacturing method thereof Technical Field The application relates to the technical field of semiconductors, in particular to an LDMOS device and a manufacturing method thereof. Background In modern electronic devices, power semiconductor devices play a vital role, especially in the fields of power management, radio frequency communication, and high voltage integrated circuits. Among them, LDMOS (Lateral diffusion metal Oxide Semiconductor) devices are widely used in high-performance power chips due to their good thermal stability, high input impedance and easy integration with conventional CMOS processes. In order to improve the comprehensive performance of the LDMOS device, researchers are long-term working on optimizing two core indexes of the LDMOS device, namely, reducing specific on-resistance (Ron, sp) as much as possible to reduce energy loss and heat generation, and improving Breakdown Voltage (BV) to ensure that the device stably works in a high-voltage environment. However, these two goals are inherently constrained in that lowering the resistance generally requires increasing the doping concentration or shortening the drift region length, which can impair the withstand voltage capability, whereas raising the withstand voltage in turn tends to result in an increase in resistance. For this reason, a variety of technical paths have been developed to balance this contradiction. For example, the surface electric field (RESURF) technology widens the peak value of the electric field by regulating and controlling the surface charge distribution, so as to improve the breakdown voltage, the Super Junction structure (Super Junction) adopts alternately arranged P-type and N-type columnar regions to realize charge compensation and significantly improve the performance, but the Super Junction structure relies on a complex deep Trench filling process, has high cost and is difficult to be miniaturized, and the Trench structure (Trench) can change the current path from transverse to longitudinal, so that the resistance is effectively reduced, but the process complexity and the reliability problems caused by a three-dimensional structure are also introduced. It can be seen that although these approaches balance the contradiction between specific on-resistance and breakdown voltage to some extent, there are significant limitations in terms of cost, manufacturability, and device miniaturization. Disclosure of Invention The application aims to provide an LDMOS device and a manufacturing method thereof, which are used for solving the problems of cost, manufacturability and device miniaturization limitation existing in the prior art. In order to achieve the above object, the technical scheme adopted by the embodiment of the application is as follows: In one aspect, an embodiment of the present application provides an LDMOS device, including: A semiconductor substrate; A drift region located on the semiconductor substrate and having a first conductivity type; A body region located at one end of the drift region and having a second conductivity type, the body region being contiguous with the drift region, the first conductivity type being opposite the second conductivity type; A gate structure located on the surface of the body region and extending partially over the drift region; a source region of a first conductivity type located within the body region and immediately adjacent to a side of the gate structure, and a body contact region of a second conductivity type adjacent to the source region; a drain region of the first conductivity type located at an end of the drift region remote from the body region; the strip-shaped current modulation units are arranged in the drift region in an interdigital alternating mode and extend and are arranged along the direction from the body region to the drain region. Optionally, the current modulation unit is obliquely arranged along the direction from the body region to the drain region, and the inclination angle ranges from 0 degrees to 45 degrees. Optionally, the inclination angle ranges from 15 ° to 30 °. Optionally, the inclination angle of the current modulation unit close to the body region is larger than the inclination angle of the current modulation unit far away from the body region. Optionally, the inclination angle of the current modulation unit gradually decreases in a direction along the body region toward the drain region. Optionally, the current modulation unit is a semiconductor region having a second conductivity type, and the current modulation unit forms a PN junction with the drift region. Optionally, the current modulation unit is a trench filled with a dielectric. Optionally, the dielectric comprises silicon dioxide or a porous medium. Optionally, the end part of the current modulation unit is arc-shaped or is subjected to rounding treatment. On the other hand, the embodiment of the application also provides a manufacturing method of the L