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CN-122002888-A - Semiconductor device and method for manufacturing the same

CN122002888ACN 122002888 ACN122002888 ACN 122002888ACN-122002888-A

Abstract

The invention provides a semiconductor device and a preparation method thereof.A substrate is internally provided with a plurality of source-drain grooves which are distributed at intervals, and the source-drain grooves extend into the substrate from the surface of the substrate; forming a first embedded epitaxial layer in the source drain groove, filling the source drain groove by the first embedded epitaxial layer, forming a second embedded epitaxial layer on the first embedded epitaxial layer, covering the top surface of the first embedded epitaxial layer and the exposed part of the top surface of the substrate by the second embedded epitaxial layer, and forming a cap layer on the second embedded epitaxial layer. The substrate and the cover cap layer are separated by the second embedded epitaxial layer, the cover cap layer cannot be in contact with the substrate, doping ions in the cover cap layer are prevented from diffusing into a channel in the substrate, and therefore short channel effect is improved.

Inventors

  • Request for anonymity

Assignees

  • 青岛澳柯玛云联信息技术有限公司

Dates

Publication Date
20260508
Application Date
20241107

Claims (20)

  1. 1. A method of manufacturing a semiconductor device, comprising: Providing a substrate, and forming a plurality of source-drain grooves which are distributed at intervals in the substrate, wherein the source-drain grooves extend into the substrate from the surface of the substrate; Forming a first embedded epitaxial layer in the source drain groove, wherein the first embedded epitaxial layer fills the source drain groove; Forming a second embedded epitaxial layer on the first embedded epitaxial layer, wherein the second embedded epitaxial layer covers the top surface of the first embedded epitaxial layer and the exposed part of the top surface of the substrate, and And forming a cap layer on the second embedded epitaxial layer.
  2. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the substrate has a plurality of gate structures thereon, a protective layer and a mask layer are sequentially stacked on sidewalls of the gate structures before forming the source/drain trenches in the substrate, a portion of the thickness of the substrate on both sides of the gate structures is etched with the mask layer as a mask to form the source/drain trenches, and And before the first embedded epitaxial layer is formed in the source drain groove, carrying out a wet cleaning process on the source drain groove, and laterally drawing out the protective layers on two sides of the source drain groove to expose part of the top surface of the substrate.
  3. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the first and second embedded epitaxial layers are each boron doped silicon germanium.
  4. 4. The method of manufacturing a semiconductor device according to claim 3, wherein after the first embedded epitaxial layer is formed, a flow rate of etching gas is reduced, and a pressure of a reaction chamber is increased to form the second embedded epitaxial layer.
  5. 5. The method for manufacturing a semiconductor device according to claim 4, wherein a flow rate of the etching gas is reduced by 5% to 20%, and a pressure of the reaction chamber is increased by 2% to 10%.
  6. 6. The method for manufacturing a semiconductor device according to claim 4, wherein after the first embedded epitaxial layer is formed, at least one of increasing a flow rate of a germanium-containing gas, decreasing a flow rate of a silicon-containing gas, and increasing a flow rate of a boron-containing gas is further performed to form the second embedded epitaxial layer.
  7. 7. The method for manufacturing a semiconductor device according to claim 6, wherein a flow rate of the germanium-containing gas is increased by 5% to 20%, a flow rate of the silicon-containing gas is decreased by 5% to 20%, and a flow rate of the boron-containing gas is increased by 5% to 15%.
  8. 8. The method for manufacturing a semiconductor device according to any one of claims 3 to 7, wherein when the first embedded epitaxial layer is formed, a flow rate of the germanium-containing gas is 15sccm to 90sccm, a flow rate of the silicon-containing gas is 100sccm to 300sccm, a flow rate of the boron-containing gas is 50sccm to 250sccm, and a temperature of the reaction chamber is 500 ℃ to 730 ℃.
  9. 9. The method for manufacturing a semiconductor device according to any one of claims 3 to 7, wherein when the second embedded epitaxial layer is formed, a flow rate of the germanium-containing gas is 20sccm to 150sccm, a flow rate of the silicon-containing gas is 100sccm to 300sccm, a flow rate of the boron-containing gas is 80sccm to 300sccm, and a temperature of the reaction chamber is 500 ℃ to 730 ℃.
  10. 10. The method for manufacturing a semiconductor device according to any one of claims 3 to 7, wherein the cap layer is made of silicon doped with boron, the flow rate of the silicon-containing gas is 100sccm to 300sccm, the flow rate of the boron-containing gas is 90sccm to 320sccm, and the temperature of the reaction chamber is 650 ℃ to 850 ℃.
  11. 11. The method of manufacturing a semiconductor device according to claim 3, wherein a boron concentration in the first embedded epitaxial layer is less than or equal to a boron concentration in the second embedded epitaxial layer, and/or a germanium concentration in the first embedded epitaxial layer is less than or equal to a germanium concentration in the second embedded epitaxial layer.
  12. 12. The method of manufacturing a semiconductor device according to claim 3 or 11, wherein the germanium concentration in the first embedded epitaxial layer gradually increases with the growth direction thereof, and/or the germanium concentration in the second embedded epitaxial layer gradually increases with the growth direction thereof.
  13. 13. The method of manufacturing a semiconductor device according to claim 3 or 11, wherein the material of the cap layer is boron-doped silicon, and the boron concentration in the cap layer gradually increases with the growth direction thereof.
  14. 14. The method of manufacturing a semiconductor device according to claim 1, wherein a top surface of the first embedded epitaxial layer is 10nm to 20nm higher than a top surface of the substrate.
  15. 15. A semiconductor device, comprising: the substrate is internally provided with a plurality of source-drain grooves which are distributed at intervals, and the source-drain grooves extend into the substrate from the surface of the substrate; the first embedded epitaxial layer is filled in the source-drain groove; A second embedded epitaxial layer on the first embedded epitaxial layer and extending to cover the top surface of the substrate part, and And the cap layer is positioned on the second embedded epitaxial layer.
  16. 16. The semiconductor device of claim 15, wherein the material of the first and second embedded epitaxial layers is boron doped silicon germanium.
  17. 17. The method of manufacturing a semiconductor device according to claim 16, wherein a boron concentration in the first embedded epitaxial layer is less than or equal to a boron concentration in the second embedded epitaxial layer, and/or a germanium concentration in the first embedded epitaxial layer is less than or equal to a germanium concentration in the second embedded epitaxial layer.
  18. 18. The semiconductor device of claim 16 or 17, wherein the germanium concentration in the first embedded epitaxial layer increases gradually with its growth direction and/or the germanium concentration in the second embedded epitaxial layer increases gradually with its growth direction.
  19. 19. The method of manufacturing a semiconductor device according to claim 16 or 17, wherein the material of the cap layer is boron-doped silicon, and the boron concentration in the cap layer gradually increases with the growth direction thereof.
  20. 20. The method of manufacturing a semiconductor device according to claim 15, wherein a top surface of the first embedded epitaxial layer is 10nm to 20nm higher than a top surface of the substrate.

Description

Semiconductor device and method for manufacturing the same Technical Field The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method thereof. Background In order to meet the requirement of high driving speed, the current PMOS transistor generally adopts an Embedded SiGe (eSiGe) technology, that is, an Embedded SiGe epitaxial layer is formed in a selective epitaxial manner in a source-drain region of the PMOS transistor, so as to increase Stress (Stress) of a channel of the PMOS transistor and enhance carrier mobility of the PMOS transistor. Fig. 1 is an electron microscope image of a PMOS transistor. After the sige epitaxial layer 10 is formed in the source-drain trench, a cap layer 20 is typically formed on the sige epitaxial layer 10, and the cap layer 20 is mainly used to prevent germanium diffusion in the sige epitaxial layer 10 and reduce the contact resistance of the sige epitaxial layer 10, so that the cap layer 20 is typically doped with boron ions at a high concentration. However, when the sige epitaxial layer 10 is grown, the growth rate of the <111> crystal orientation is slow, and the sige epitaxial layer 10 eventually takes a diamond shape, i.e., a shape of "Σ" as recognized in the industry, after the cap layer 20 is formed on the sige epitaxial layer 10, the cap layer 20 contacts the substrate (at a position indicated by a dotted circle in fig. 1), and when the cap layer 20 is formed and the annealing process is performed subsequently, boron ions in the cap layer 20 are easily diffused into a channel in the substrate through a contact position between the cap layer 20 and the substrate, so that the concentration of boron ions in the channel is increased, and short channel effects become serious. Disclosure of Invention The invention aims to provide a semiconductor device and a preparation method thereof, which are used for solving the problem that the short channel effect of the traditional semiconductor device is serious. In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device, comprising: Providing a substrate, and forming a plurality of source-drain grooves which are distributed at intervals in the substrate, wherein the source-drain grooves extend into the substrate from the surface of the substrate; Forming a first embedded epitaxial layer in the source drain groove, wherein the first embedded epitaxial layer fills the source drain groove; Forming a second embedded epitaxial layer on the first embedded epitaxial layer, wherein the second embedded epitaxial layer covers the top surface of the first embedded epitaxial layer and the exposed part of the top surface of the substrate, and And forming a cap layer on the second embedded epitaxial layer. Optionally, the substrate is provided with a plurality of gate structures, a protective layer and a mask layer which are stacked in sequence are formed on the side wall of the gate structures before the source and drain grooves are formed in the substrate, the mask layer is used as a mask, partial thicknesses of the substrate on two sides of the gate structures are etched to form the source and drain grooves, and And before the first embedded epitaxial layer is formed in the source drain groove, carrying out a wet cleaning process on the source drain groove, and laterally drawing out the protective layers on two sides of the source drain groove to expose part of the top surface of the substrate. Optionally, the materials of the first embedded epitaxial layer and the second embedded epitaxial layer are boron doped silicon germanium. Optionally, after the first embedded epitaxial layer is formed, reducing the flow of etching gas and increasing the pressure of the reaction chamber to form the second embedded epitaxial layer. Optionally, the flow rate of the etching gas is reduced by 5% -20%, and the pressure of the reaction chamber is increased by 2% -10%. Optionally, after forming the first embedded epitaxial layer, at least one of increasing the flow of the germanium-containing gas, decreasing the flow of the silicon-containing gas, and increasing the flow of the boron-containing gas is also performed to form the second embedded epitaxial layer. Optionally, the flow rate of the germanium-containing gas is increased by 5% -20%, the flow rate of the silicon-containing gas is reduced by 5% -20%, and the flow rate of the boron-containing gas is increased by 5% -15%. Optionally, when the first embedded epitaxial layer is formed, the flow rate of the germanium-containing gas is 15 sccm-90 sccm, the flow rate of the silicon-containing gas is 100 sccm-300 sccm, the flow rate of the boron-containing gas is 50 sccm-250 sccm, and the temperature of the reaction chamber is 500 ℃ to 730 ℃. Optionally, when the second embedded epitaxial layer is formed, the flow rate of the germanium-containing gas is 20 sccm-150 sccm, the flow ra