CN-122002897-A - Semiconductor device with a semiconductor layer having a plurality of semiconductor layers

Abstract

A semiconductor device includes a substrate, a plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each of the plurality of transistor structures including a lower active pattern and an upper active pattern spaced apart from the lower active pattern in a second direction intersecting the first direction, a gate cutting film disposed between two adjacent transistor structures of the plurality of transistor structures, and a first layer and a second layer disposed for each lower active pattern, the first layer surrounding at least a first portion of the lower active pattern, the second layer disposed on each first layer. Each of the plurality of transistor structures includes a first work function film surrounding a first portion of the lower active pattern and a second work function film surrounding at least the first portion of the upper active pattern and extending in a first direction, and the gate cutting film penetrates the second work function film to form a gap between the first portion of the second work function film and a second portion of the second work function film.

Inventors

• Wen Binggao
• Jin Minyou
• HUANG DONGXUN
• JIN CHENGGUANG
• JIN XIANZHU
• LI YUANCHANG
• Quan Zaigao

Assignees

• 三星电子株式会社

Dates

Publication Date

20260508

Application Date

20250703

Priority Date

20241101

Claims (20)

1. 1. A semiconductor device, comprising: A substrate; A plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each transistor structure of the plurality of transistor structures including a lower active pattern and an upper active pattern spaced apart from the lower active pattern in a second direction intersecting the first direction; A gate cutting film disposed between two adjacent transistor structures of the plurality of transistor structures, and For each lower active pattern, a first layer surrounding at least a first portion of the lower active pattern and a second layer disposed on each first layer, Wherein each of the plurality of transistor structures includes a first work function film surrounding a first portion of the lower active pattern and a second work function film surrounding at least a first portion of the upper active pattern and extending in the first direction, and Wherein the gate cutting film penetrates the second work function film to form a gap between a first portion of the second work function film and a second portion of the second work function film.
2. 2. The semiconductor device according to claim 1, wherein the gate cutting film has a length that gradually decreases as the gate cutting film approaches the substrate in the first direction.
3. 3. The semiconductor device of claim 1, wherein the first work function film comprises a gap formed therebetween at a location between the plurality of transistor structures.
4. 4. The semiconductor device of claim 1, further comprising a separation insulating film disposed in each transistor structure and between the lower active pattern and the upper active pattern, Wherein the separation insulating film is in contact with the second work function film.
5. 5. The semiconductor device of claim 1, wherein at least a common gate transistor structure of the plurality of transistor structures comprises a region where the first and second work function films contact each other.
6. 6. The semiconductor device of claim 5, wherein: in the structure of the common gate transistor, The surface area of the entire contact area where the second work function film and the second layer contact each other is larger than the surface area of the entire contact area where the first work function film and the second work function film contact each other.
7. 7. The semiconductor device of claim 5, wherein: in the structure of the common gate transistor, The second work function film includes a bottommost surface closer to the substrate than an uppermost surface of the first work function film in the second direction.
8. 8. The semiconductor device of claim 1, wherein at least a split gate transistor structure of the plurality of transistor structures comprises a region in which the first work function film comprises an uppermost surface that is closer to the substrate than a bottommost surface of the second work function film is to the substrate in the second direction.
9. 9. The semiconductor device of claim 8, wherein: In the case of the split gate transistor structure, A length T 1 in the second direction between an uppermost surface of the first work function film and a lowermost surface of the second work function film is less than 5.8nm.
10. 10. The semiconductor device of claim 8, wherein the split gate transistor structure further comprises a separation insulating film disposed between the lower active pattern and the upper active pattern, A ratio T 1 /T 2 of a length T 1 between an uppermost surface of the first work function film and a bottommost surface of the second work function film to a length T 2 of the separation insulating film in the second direction is 0.5 or less.
11. 11. The semiconductor device of claim 1, wherein the first layer comprises a first insulating material and the second layer comprises a second insulating material, and A portion of the first layer is disposed between the plurality of transistor structures continuously in the first direction.
12. 12. The semiconductor device of claim 11, wherein: A first transistor structure of the plurality of transistor structures includes a region where the first work function film and the second work function film contact each other, and In the first transistor structure, an uppermost surface of the first layer is closer to the substrate than a bottommost surface of the second work function film is to the substrate.
13. 13. The semiconductor device of claim 11, wherein the plurality of transistor structures comprises a first transistor structure comprising a region where the first and second work function films contact each other, and a second transistor structure comprising the first work function film comprising an uppermost surface closer to the substrate in the second direction than a bottommost surface of the second work function film, and Wherein a maximum thickness of the second work function film of the first transistor structure in the second direction is the same as a maximum thickness of the second work function film of the second transistor structure in the second direction.
14. 14. The semiconductor device of claim 1, wherein the first layer comprises a conductive material and the second layer comprises an insulating material, and Wherein gaps are formed in the first layer between the plurality of transistor structures.
15. 15. The semiconductor device according to claim 14, wherein the plurality of transistor structures includes a first transistor structure including a region where the first work function film and the second work function film are in contact with each other, and Wherein, in the first transistor structure, the second work function film includes a bottommost surface closer to the substrate than an uppermost surface of the first layer.
16. 16. The semiconductor device of claim 14, wherein the plurality of transistor structures comprises a first transistor structure comprising a region where the first and second work function films contact each other, and a second transistor structure comprising the first work function film comprising an uppermost surface closer to the substrate in the second direction than a bottommost surface of the second work function film, and Wherein a maximum thickness of the second work function film of the first transistor structure in the second direction is greater than a maximum thickness of the second work function film of the second transistor structure in the second direction.
17. 17. The semiconductor device of claim 16, wherein the first transistor structure comprises the first work function film comprising a recessed portion at an interface with the second work function film.
18. 18. A semiconductor device, comprising: A substrate; A plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each transistor structure including a lower active pattern including a plurality of thin plates spaced apart from each other in a second direction intersecting the first direction, an upper active pattern spaced apart from the lower active pattern in the second direction and including a plurality of thin plates spaced apart from each other in the second direction, and a separation insulating film disposed between the lower active pattern and the upper active pattern; A gate cutting film disposed between adjacent transistor structures of the plurality of transistor structures; a first layer surrounding at least a portion of each of the lower active patterns, and A second layer disposed on the first layer, Wherein the gate cutting film penetrates through the work function film in the second direction to fill a gap in the work function film.
19. 19. The semiconductor device according to claim 18, wherein a bottommost surface of the gate cutting film is closer to the substrate than an uppermost surface of the separation insulating film is to the substrate.
20. 20. A semiconductor device, comprising: A substrate; A plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each transistor structure including a lower active pattern including a plurality of thin plates spaced apart from each other in a second direction intersecting the first direction, an upper active pattern spaced apart from the lower active pattern in the second direction and including a plurality of thin plates spaced apart from each other in the second direction, and a separation insulating film disposed between the lower active pattern and the upper active pattern; A gate cutting film disposed between adjacent transistor structures of the plurality of transistor structures; a first layer surrounding at least a portion of each of the lower active patterns, and A second layer disposed on the first layer, Wherein the gate cutting film penetrates a second work function film in the second direction such that the second work function film has a gap therein with respect to the first direction, and a length of the gate cutting film with respect to the first direction decreases as the gate cutting film approaches the substrate; wherein the gate cutting film includes a bottommost surface closer to the substrate than an uppermost surface of the separation insulating film; Wherein a portion of the first work function film has a gap formed therebetween between the plurality of transistor structures, and Wherein the separation insulating film is in contact with the second work function film.

Description

Semiconductor device with a semiconductor layer having a plurality of semiconductor layers Cross Reference to Related Applications The present application claims the benefit of korean patent application No.10-2024-0153650, filed on 1 month 11 of 2024, to the korean intellectual property office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field Example embodiments relate to a semiconductor device. Background Fin field effect transistors (finfets) and nanoflake field effect transistors have been introduced as integrated circuit technologies with high density devices and high performance. The FinFET includes a channel layer surrounded on at least three sides by a gate structure and has one or more vertical fin structures disposed to extend in a horizontal direction. As regards nanoflake field effect transistors, for example, fully wrap Gate (GAA) transistors or multi-bridge channel (MBC) transistor products are known, and nanoflake field effect transistors comprise one or more nanoflake channel layers vertically stacked on a substrate, and a gate structure surrounding the surrounding surface of each nanoflake channel layer. Meanwhile, in order to increase the density of devices, a 3D stacked field effect transistor (3 DSFET) has been proposed in which a lower nanoflake field effect transistor and an upper nanoflake field effect transistor are stacked. Recently, as the size of semiconductor devices is reduced, the size of standard cells included in integrated circuits is continuously reduced, and for devices including cross-coupling structures, it is not generally possible to violate design rules to achieve reduced size standard cells. Disclosure of Invention An aspect provides a semiconductor device whose integration level can be improved by downsizing, and electrical reliability can be improved. The technical tasks to be achieved by the present example embodiments are not limited to those described above or below, and other technical tasks may be inferred from the following example embodiments by those skilled in the art. According to one aspect, a semiconductor device includes a substrate, a plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each of the plurality of transistor structures including a lower active pattern and an upper active pattern spaced apart from the lower active pattern in a second direction intersecting the first direction, a gate cutting film disposed between two adjacent transistor structures of the plurality of transistor structures, and a first layer and a second layer disposed for each of the lower active patterns, the first layer surrounding at least the lower active pattern, the second layer disposed on each of the first layers. Each of the plurality of transistor structures includes a first work function film surrounding a first portion of the lower active pattern and a second work function film surrounding at least the first portion of the upper active pattern and extending in a first direction, and the gate cutting film penetrates the second work function film to form a gap between the first portion of the second work function film and a second portion of the second work function film. According to one aspect, a semiconductor device includes a substrate, a plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each transistor structure including a lower active pattern including a plurality of sheets spaced apart from each other in a second direction intersecting the first direction, an upper active pattern spaced apart from the lower active pattern in the second direction and including a plurality of sheets spaced apart from each other in the second direction, and a separation insulating film disposed between the lower active pattern and the upper active pattern, a gate cutting film disposed between adjacent transistor structures among the plurality of transistor structures, a first layer surrounding at least a portion of each of the lower active patterns, and a second layer disposed on the first layer. The gate cutting film penetrates the work function film in the second direction to fill the gap in the work function film. According to one aspect, a semiconductor device includes a substrate, a plurality of transistor structures disposed on the substrate and spaced apart from each other in a first direction parallel to a surface of the substrate, each transistor structure including a lower active pattern including a plurality of sheets spaced apart from each other in a second direction intersecting the first direction, an upper active pattern spaced apart from the lower active pattern in the second direction and including a plurality of sheets spaced apart from each other in the second direction, and a separation insulating film dispos