Search

CN-122002904-A - Novel ectopic trigger SCR structure

CN122002904ACN 122002904 ACN122002904 ACN 122002904ACN-122002904-A

Abstract

The invention discloses a novel ectopic trigger SCR structure, which belongs to the technical field of semiconductor devices and comprises a first conductive type substrate, a first conductive type well region, a second conductive type well region, a first trigger region and a second trigger region, wherein the first conductive type well region is arranged in the first conductive type substrate, the second conductive type well region is arranged on one side of the first conductive type well region, the first trigger region is arranged in the second conductive type well region, the second trigger region spans the juncture of the first conductive type substrate and the first conductive type well region, the bottom of the second trigger region is also connected with a deep well region, the first trigger region, the second trigger region and the deep well region are of a second conductive type, and the first trigger region and the second trigger region are mutually connected through metal at the top. The first trigger area and the second trigger area which are connected with each other are added to divide the current into two parts so as to control the trigger point and the trigger direction of the device, improve the voltage and current characteristics of the SCR device and realize better maintaining voltage and failure current characteristics of the novel ectopic trigger SCR structure.

Inventors

  • ZHOU JIAN
  • WANG SHUAIQI
  • ZHANG DAIZHONG

Assignees

  • 杰平方半导体(上海)有限公司

Dates

Publication Date
20260508
Application Date
20241030

Claims (10)

  1. 1. Novel ectopic trigger SCR structure, characterized by, include: A first conductive type substrate; A first conductive-type well region disposed in the first conductive-type substrate; A second conductive-type well region disposed at one side of the first conductive-type well region; a first trigger region disposed in the second conductivity type well region; And the second trigger area crosses the junction of the first conductive type substrate and the first conductive type well area, and the bottom of the second trigger area is also connected with a deep well area, wherein the first trigger area, the second trigger area and the deep well area are of a second conductive type, and the first trigger area and the second trigger area are mutually connected through metal at the top.
  2. 2. The novel ex situ triggered SCR structure of claim 1, wherein the first conductivity type substrate is a P-type substrate, the first conductivity type well region is a P-type well region, and the second conductivity type well region is a first N-type well region.
  3. 3. The novel ex-situ triggered SCR structure of claim 2, wherein a first N-type trigger region is disposed in the first N-type well region, and a second N-type trigger region is disposed at a junction of the P-type well region and the P-type substrate.
  4. 4. The novel ex situ trigger SCR structure of claim 3, wherein said second N-type trigger region is further connected to a second N-type well region, and wherein one side of said second N-type well region is further connected to a sidewall of said P-type well region.
  5. 5. The novel ectopic trigger SCR structure of claim 3, wherein an anode P-type region is further arranged in the first N-type well region, one side of the anode P-type region is connected with an anode N-type region, and the first N-type trigger region is arranged at intervals on the other side.
  6. 6. The novel ex situ trigger SCR structure of claim 3, further comprising an oxide layer disposed on top of said P-type substrate.
  7. 7. The novel ex situ trigger SCR structure as defined in claim 5 or 6, wherein the oxide layer on top of the anode N-type and anode P-type regions is correspondingly covered with anode metal, and the anode metal connects the anode N-type and anode P-type regions through perforations in the oxide layer.
  8. 8. The novel ectopic trigger SCR structure of claim 3, wherein a cathode N-type region is further arranged in the P-type well region, one side of the cathode N-type region is connected with a cathode P-type region, and the second N-type trigger region is arranged at intervals on the other side.
  9. 9. The novel ex situ trigger SCR structure as defined in claim 6 or 8, wherein the oxide layer on top of the cathode N-type and P-type regions is correspondingly covered with a first cathode metal, and the first cathode metal connects the cathode N-type and P-type regions through perforations in the oxide layer.
  10. 10. The novel ex situ triggered SCR structure of claim 9, wherein a second cathode metal is disposed on the oxide layer, wherein the second cathode metal is concave and surrounds a portion of the first cathode metal, wherein two sides of the second cathode metal are covered on the oxide layer at the top of the first and second N-type trigger regions, and wherein the second cathode metal connects the first and second N-type trigger regions through perforations in the oxide layer.

Description

Novel ectopic trigger SCR structure Technical Field The invention relates to the technical field of semiconductor devices, in particular to a novel ectopic trigger SCR structure. Background ESD, i.e., electrostatic discharge, is an old natural phenomenon. ESD exists at every corner of people's daily life. But such common electrical phenomena are fatal threats to sophisticated integrated circuits. An electrical surge/transient voltage, which refers to a random and over-normal high voltage or high current that suddenly occurs in the circuit, is characterized by a short time of occurrence and a very high instantaneous energy. The electric surge has strong destructiveness to the electronic element and the integrated circuit, the light logic circuit is induced to generate misoperation, and the heavy logic circuit is induced to generate serious thermal effects such as secondary breakdown of the triode, latch-up effect of the complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) and the like, so that the device or the integrated circuit is disabled. Electrical surges typically have two sources of randomness, the first being an unstable factor of the power grid, such as abrupt switching, abrupt start-up of capacitive or inductive loads, hot plugging of associated equipment, unstable operation of associated electrical power sources, etc. The second is external sudden interference such as lightning, electrostatic discharge, etc. As integrated circuit fabrication processes have increased, their minimum linewidths have decreased to sub-micron and even nanometer levels, and as chip performance has increased, their resistance to ESD attack has also decreased substantially, thus causing more serious electrostatic damage. Most of the ESD generation can cause non-fatal damage to the integrated circuit, thereby reducing the life span and reliability of the integrated circuit, and further causing degradation of system functions, which is a great impediment to achieving large-scale high-reliability integration. In order to realize an ESD device with excellent maintaining voltage and failure current characteristics, the invention provides a novel ex-situ trigger SCR structure shown in figure 2 by utilizing a novel cathode metal structure and a novel device triggering mode on the basis of the conventional SCR device structure shown in figure 1. It should be noted that the information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art. Disclosure of Invention The invention aims to provide a novel ectopic trigger SCR structure so as to solve the problems of maintaining voltage and failure current of an ESD device. In order to solve the technical problems, the invention provides a novel ectopic trigger SCR structure, which comprises: A first conductive type substrate; A first conductive-type well region disposed in the first conductive-type substrate; A second conductive-type well region disposed at one side of the first conductive-type well region; a first trigger region disposed in the second conductivity type well region; And the second trigger area crosses the junction of the first conductive type substrate and the first conductive type well area, and the bottom of the second trigger area is also connected with a deep well area, wherein the first trigger area, the second trigger area and the deep well area are of a second conductive type, and the first trigger area and the second trigger area are mutually connected through metal at the top. Preferably, the first conductive type substrate is a P-type substrate, the first conductive type well region is a P-type well region, and the second conductive type well region is a first N-type well region. Preferably, a first N-type trigger region is arranged in the first N-type well region, and a second N-type trigger region is arranged at the junction of the P-type well region and the P-type substrate. Preferably, the bottom of the second N-type trigger region is further connected with a second N-type well region, and one side of the second N-type well region is further connected with the side wall of the P-type well region. Preferably, an anode P-type region is further arranged in the first N-type well region, one side of the anode P-type region is connected with an anode N-type region, and the first N-type trigger region is arranged at intervals on the other side of the anode P-type region. Preferably, the semiconductor device further comprises an oxide layer which is arranged on the top of the P-type substrate. Preferably, the oxide layers on the top of the anode N-type region and the anode P-type region are correspondingly covered with anode metal, and the anode metal is connected with the anode N-type region and the anode P-